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<h3>
Graham Inggs pushed to branch master
at <a href="https://salsa.debian.org/med-team/libpll">Debian Med / libpll</a>
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<h4>
Commits:
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<ul>
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<strong><a href="https://salsa.debian.org/med-team/libpll/commit/68203216db0d4128452f08a0dc148e6271d869c3">68203216</a></strong>
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<span>by Graham Inggs</span>
<i>at 2018-06-23T20:07:40+02:00</i>
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<pre class="commit-message" style="white-space: pre-wrap; margin: 0;">Update symbols for !x86 architectures
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<h4>2 changed files:</h4>
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<li class="file-stats">
<a href="#9c96da0e9f91d7d8937b69b524702c106258f0d1">
debian/changelog
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<li class="file-stats">
<a href="#a068a880906bd2accee83f753b8e349e420b800e">
debian/libpll0.symbols
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<h4>Changes:</h4>
<li id="9c96da0e9f91d7d8937b69b524702c106258f0d1">
<a href="https://salsa.debian.org/med-team/libpll/commit/68203216db0d4128452f08a0dc148e6271d869c3#9c96da0e9f91d7d8937b69b524702c106258f0d1"><strong>debian/changelog</strong></a>
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<pre style="margin: 0;">+<span id="LC1" class="line" lang="plaintext">libpll (0.3.2-2) UNRELEASED; urgency=medium</span>
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<pre style="margin: 0;">+<span id="LC2" class="line" lang="plaintext"></span>
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<pre style="margin: 0;">+<span id="LC3" class="line" lang="plaintext"> * Update symbols for !x86 architectures (Closes: #902205)</span>
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<pre style="margin: 0;">+<span id="LC4" class="line" lang="plaintext"></span>
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<pre style="margin: 0;">+<span id="LC5" class="line" lang="plaintext"> -- Graham Inggs <ginggs@debian.org> Sat, 23 Jun 2018 18:05:14 +0000</span>
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<pre style="margin: 0;">+<span id="LC6" class="line" lang="plaintext"></span>
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<pre style="margin: 0;"> <span id="LC7" class="line" lang="plaintext">libpll (0.3.2-1) unstable; urgency=medium</span>
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<pre style="margin: 0;"> <span id="LC8" class="line" lang="plaintext"></span>
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<pre style="margin: 0;"> <span id="LC9" class="line" lang="plaintext"> * New upstream version</span>
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<li id="a068a880906bd2accee83f753b8e349e420b800e">
<a href="https://salsa.debian.org/med-team/libpll/commit/68203216db0d4128452f08a0dc148e6271d869c3#a068a880906bd2accee83f753b8e349e420b800e"><strong>debian/libpll0.symbols</strong></a>
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<td class="diff-line-num unfold js-unfold old_line" data-linenumber="49" style="width: 35px; color: rgba(0,0,0,0.3); border-right-width: 1px; border-right-color: #f0f0f0; border-right-style: solid; padding: 0 5px;" align="right" bgcolor="#fafafa">...</td>
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<td class="line_content match " style="padding-left: 0.5em; padding-right: 0.5em; color: rgba(0,0,0,0.3);" bgcolor="#fafafa">@@ -49,70 +49,70 @@ libpll.so.0 libpll0 #MINVER#</td>
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<pre style="margin: 0;"> <span id="LC49" class="line" lang="plaintext"> pll_compute_likelihood_derivatives@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC50" class="line" lang="plaintext"> pll_compute_root_loglikelihood@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC51" class="line" lang="plaintext"> pll_core_create_lookup@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC52" class="line" lang="plaintext"> pll_core_create_lookup_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC52" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_create_lookup_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC53" class="line" lang="plaintext"> pll_core_create_lookup_4x4@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC54" class="line" lang="plaintext"> pll_core_create_lookup_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC55" class="line" lang="plaintext"> pll_core_create_lookup_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC56" class="line" lang="plaintext"> pll_core_create_lookup_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC57" class="line" lang="plaintext"> pll_core_create_lookup_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC54" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_create_lookup_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC55" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_create_lookup_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC56" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_create_lookup_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC57" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_create_lookup_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC58" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ii@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC59" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ii_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC60" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ii_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC61" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ii_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC62" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ii_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC63" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ii_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC59" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ii_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC60" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ii_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC61" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ii_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC62" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ii_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC63" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ii_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC64" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC65" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti_20x20_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC66" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC65" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ti_20x20_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC66" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ti_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC67" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti_4x4@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC68" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC69" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC70" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC71" class="line" lang="plaintext"> pll_core_edge_loglikelihood_ti_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC68" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ti_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC69" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ti_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC70" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ti_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC71" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_edge_loglikelihood_ti_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC72" class="line" lang="plaintext"> pll_core_likelihood_derivatives@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC73" class="line" lang="plaintext"> pll_core_likelihood_derivatives_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC74" class="line" lang="plaintext"> pll_core_likelihood_derivatives_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC73" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_likelihood_derivatives_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC74" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_likelihood_derivatives_avx@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC75" class="line" lang="plaintext"> pll_core_root_loglikelihood@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC76" class="line" lang="plaintext"> pll_core_root_loglikelihood_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC77" class="line" lang="plaintext"> pll_core_root_loglikelihood_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC78" class="line" lang="plaintext"> pll_core_root_loglikelihood_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC79" class="line" lang="plaintext"> pll_core_root_loglikelihood_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC80" class="line" lang="plaintext"> pll_core_root_loglikelihood_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC76" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_root_loglikelihood_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC77" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_root_loglikelihood_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC78" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_root_loglikelihood_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC79" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_root_loglikelihood_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC80" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_root_loglikelihood_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC81" class="line" lang="plaintext"> pll_core_update_partial_ii@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC82" class="line" lang="plaintext"> pll_core_update_partial_ii_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC83" class="line" lang="plaintext"> pll_core_update_partial_ii_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC84" class="line" lang="plaintext"> pll_core_update_partial_ii_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC85" class="line" lang="plaintext"> pll_core_update_partial_ii_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC86" class="line" lang="plaintext"> pll_core_update_partial_ii_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC82" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ii_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC83" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ii_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC84" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ii_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC85" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ii_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC86" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ii_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC87" class="line" lang="plaintext"> pll_core_update_partial_ti@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC88" class="line" lang="plaintext"> pll_core_update_partial_ti_20x20_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC89" class="line" lang="plaintext"> pll_core_update_partial_ti_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC88" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ti_20x20_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC89" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ti_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC90" class="line" lang="plaintext"> pll_core_update_partial_ti_4x4@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC91" class="line" lang="plaintext"> pll_core_update_partial_ti_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC92" class="line" lang="plaintext"> pll_core_update_partial_ti_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC93" class="line" lang="plaintext"> pll_core_update_partial_ti_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC94" class="line" lang="plaintext"> pll_core_update_partial_ti_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC95" class="line" lang="plaintext"> pll_core_update_partial_ti_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC91" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ti_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC92" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ti_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC93" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ti_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC94" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ti_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC95" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_ti_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC96" class="line" lang="plaintext"> pll_core_update_partial_tt@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC97" class="line" lang="plaintext"> pll_core_update_partial_tt_4x4@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC98" class="line" lang="plaintext"> pll_core_update_partial_tt_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC99" class="line" lang="plaintext"> pll_core_update_partial_tt_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC100" class="line" lang="plaintext"> pll_core_update_partial_tt_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC101" class="line" lang="plaintext"> pll_core_update_partial_tt_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC98" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_tt_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC99" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_tt_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC100" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_tt_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC101" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_partial_tt_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC102" class="line" lang="plaintext"> pll_core_update_pmatrix@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC103" class="line" lang="plaintext"> pll_core_update_pmatrix_20x20_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC104" class="line" lang="plaintext"> pll_core_update_pmatrix_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC105" class="line" lang="plaintext"> pll_core_update_pmatrix_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC106" class="line" lang="plaintext"> pll_core_update_pmatrix_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC103" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_pmatrix_20x20_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC104" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_pmatrix_20x20_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC105" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_pmatrix_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC106" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_pmatrix_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC107" class="line" lang="plaintext"> pll_core_update_sumtable_ii@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC108" class="line" lang="plaintext"> pll_core_update_sumtable_ii_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC109" class="line" lang="plaintext"> pll_core_update_sumtable_ii_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC110" class="line" lang="plaintext"> pll_core_update_sumtable_ii_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC108" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_sumtable_ii_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC109" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_sumtable_ii_avx@Base 0.3.2</span>
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110
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<pre style="margin: 0;">+<span id="LC110" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_sumtable_ii_sse@Base 0.3.2</span>
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111
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111
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<pre style="margin: 0;"> <span id="LC111" class="line" lang="plaintext"> pll_core_update_sumtable_ti@Base 0.3.2</span>
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112
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112
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<pre style="margin: 0;"> <span id="LC112" class="line" lang="plaintext"> pll_core_update_sumtable_ti_4x4@Base 0.3.2</span>
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113
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<pre style="margin: 0;">-<span id="LC113" class="line" lang="plaintext"> pll_core_update_sumtable_ti_avx2@Base 0.3.2</span>
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114
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<pre style="margin: 0;">-<span id="LC114" class="line" lang="plaintext"> pll_core_update_sumtable_ti_avx@Base 0.3.2</span>
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115
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<pre style="margin: 0;">-<span id="LC115" class="line" lang="plaintext"> pll_core_update_sumtable_ti_sse@Base 0.3.2</span>
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113
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<pre style="margin: 0;">+<span id="LC113" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_sumtable_ti_avx2@Base 0.3.2</span>
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114
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<pre style="margin: 0;">+<span id="LC114" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_sumtable_ti_avx@Base 0.3.2</span>
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115
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<pre style="margin: 0;">+<span id="LC115" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_core_update_sumtable_ti_sse@Base 0.3.2</span>
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116
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116
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<pre style="margin: 0;"> <span id="LC116" class="line" lang="plaintext"> pll_count_invariant_sites@Base 0.3.2</span>
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117
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<pre style="margin: 0;"> <span id="LC117" class="line" lang="plaintext"> pll_dlist_append@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC118" class="line" lang="plaintext"> pll_dlist_prepend@Base 0.3.2</span>
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<td class="diff-line-num unfold js-unfold old_line" data-linenumber="127" style="width: 35px; color: rgba(0,0,0,0.3); border-right-width: 1px; border-right-color: #f0f0f0; border-right-style: solid; padding: 0 5px;" align="right" bgcolor="#fafafa">...</td>
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<td class="line_content match " style="padding-left: 0.5em; padding-right: 0.5em; color: rgba(0,0,0,0.3);" bgcolor="#fafafa">@@ -127,23 +127,23 @@ libpll.so.0 libpll0 #MINVER#</td>
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<pre style="margin: 0;"> <span id="LC127" class="line" lang="plaintext"> pll_fasta_rewind@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC128" class="line" lang="plaintext"> pll_fastparsimony_edge_score@Base 0.3.2</span>
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<pre style="margin: 0;"> <span id="LC129" class="line" lang="plaintext"> pll_fastparsimony_edge_score_4x4@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC130" class="line" lang="plaintext"> pll_fastparsimony_edge_score_4x4_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC131" class="line" lang="plaintext"> pll_fastparsimony_edge_score_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC132" class="line" lang="plaintext"> pll_fastparsimony_edge_score_4x4_sse@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC133" class="line" lang="plaintext"> pll_fastparsimony_edge_score_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC134" class="line" lang="plaintext"> pll_fastparsimony_edge_score_avx@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC135" class="line" lang="plaintext"> pll_fastparsimony_edge_score_sse@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC130" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_edge_score_4x4_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC131" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_edge_score_4x4_avx@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC132" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_edge_score_4x4_sse@Base 0.3.2</span>
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133
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<pre style="margin: 0;">+<span id="LC133" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_edge_score_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">+<span id="LC134" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_edge_score_avx@Base 0.3.2</span>
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135
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<pre style="margin: 0;">+<span id="LC135" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_edge_score_sse@Base 0.3.2</span>
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136
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136
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<pre style="margin: 0;"> <span id="LC136" class="line" lang="plaintext"> pll_fastparsimony_init@Base 0.3.2</span>
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137
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137
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<pre style="margin: 0;"> <span id="LC137" class="line" lang="plaintext"> pll_fastparsimony_root_score@Base 0.3.2</span>
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138
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138
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<pre style="margin: 0;"> <span id="LC138" class="line" lang="plaintext"> pll_fastparsimony_stepwise@Base 0.3.2</span>
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139
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139
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<pre style="margin: 0;"> <span id="LC139" class="line" lang="plaintext"> pll_fastparsimony_update_vector@Base 0.3.2</span>
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140
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140
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<pre style="margin: 0;"> <span id="LC140" class="line" lang="plaintext"> pll_fastparsimony_update_vector_4x4@Base 0.3.2</span>
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141
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<pre style="margin: 0;">-<span id="LC141" class="line" lang="plaintext"> pll_fastparsimony_update_vector_4x4_avx2@Base 0.3.2</span>
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142
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<pre style="margin: 0;">-<span id="LC142" class="line" lang="plaintext"> pll_fastparsimony_update_vector_4x4_avx@Base 0.3.2</span>
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143
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<pre style="margin: 0;">-<span id="LC143" class="line" lang="plaintext"> pll_fastparsimony_update_vector_4x4_sse@Base 0.3.2</span>
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144
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<pre style="margin: 0;">-<span id="LC144" class="line" lang="plaintext"> pll_fastparsimony_update_vector_avx2@Base 0.3.2</span>
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<pre style="margin: 0;">-<span id="LC145" class="line" lang="plaintext"> pll_fastparsimony_update_vector_avx@Base 0.3.2</span>
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146
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<pre style="margin: 0;">-<span id="LC146" class="line" lang="plaintext"> pll_fastparsimony_update_vector_sse@Base 0.3.2</span>
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141
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<pre style="margin: 0;">+<span id="LC141" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_update_vector_4x4_avx2@Base 0.3.2</span>
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142
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<pre style="margin: 0;">+<span id="LC142" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_update_vector_4x4_avx@Base 0.3.2</span>
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143
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<pre style="margin: 0;">+<span id="LC143" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_update_vector_4x4_sse@Base 0.3.2</span>
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144
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<pre style="margin: 0;">+<span id="LC144" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_update_vector_avx2@Base 0.3.2</span>
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145
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<pre style="margin: 0;">+<span id="LC145" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_update_vector_avx@Base 0.3.2</span>
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146
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<pre style="margin: 0;">+<span id="LC146" class="line" lang="plaintext"> <span class="idiff left right">(arch=amd64 i386 hurd-i386 kfreebsd-amd64 kfreebsd-i386 x32)</span>pll_fastparsimony_update_vector_sse@Base 0.3.2</span>
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147
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147
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<pre style="margin: 0;"> <span id="LC147" class="line" lang="plaintext"> pll_fastparsimony_update_vectors@Base 0.3.2</span>
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148
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148
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<pre style="margin: 0;"> <span id="LC148" class="line" lang="plaintext"> pll_hardware@Base 0.3.2</span>
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149
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149
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<pre style="margin: 0;"> <span id="LC149" class="line" lang="plaintext"> pll_hardware_dump@Base 0.3.2</span>
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