[med-svn] [Git][med-team/simde][upstream] New upstream version 0.0.0.git.20200404
Michael R. Crusoe
gitlab at salsa.debian.org
Sat Apr 4 12:26:39 BST 2020
Michael R. Crusoe pushed to branch upstream at Debian Med / simde
Commits:
aaef32f5 by Michael R. Crusoe at 2020-04-04T12:54:10+02:00
New upstream version 0.0.0.git.20200404
- - - - -
16 changed files:
- .appveyor.yml
- .travis.yml
- simde/simde-common.h
- simde/x86/avx.h
- simde/x86/avx2.h
- simde/x86/avx512f.h
- simde/x86/sse.h
- simde/x86/sse2.h
- simde/x86/sse4.1.h
- test/run-tests.h
- test/x86/avx.c
- test/x86/avx512f.c
- test/x86/fma.c
- test/x86/skel.c
- test/x86/sse.c
- test/x86/sse2.c
Changes:
=====================================
.appveyor.yml
=====================================
@@ -17,7 +17,7 @@ before_build:
cd test
mkdir build
cd build
- cmake -G "$env:GENERATOR" -DALWAYS_BUILD_NATIVE_TESTS=ON ..
+ cmake -G "$env:GENERATOR" -DALWAYS_BUILD_NATIVE_TESTS=ON -DCMAKE_C_FLAGS="/W4 /WX" -DCMAKE_CXX_FLAGS="/W4 /WX" ..
build_script:
- ps: |
=====================================
.travis.yml
=====================================
@@ -153,6 +153,7 @@ jobs:
- ARCH_FLAGS="/arch:AVX2"
- CMAKE_GENERATOR="Visual Studio 15 2017"
- OPTIMIZATION_FLAGS="/Ox"
+ - COMPILER_FLAGS="/W4 /WX"
- name: msvc x86_64
os: windows
@@ -160,6 +161,7 @@ jobs:
- ARCH_FLAGS="/arch:AVX2"
- CMAKE_GENERATOR="Visual Studio 15 2017 Win64"
- OPTIMIZATION_FLAGS="/Ox"
+ - COMPILER_FLAGS="/W4 /WX"
- name: msvc arm
os: windows
@@ -168,6 +170,7 @@ jobs:
- CMAKE_GENERATOR="Visual Studio 15 2017 ARM"
- RUN_TESTS=false
- OPTIMIZATION_FLAGS="/Ox"
+ - COMPILER_FLAGS="/W4 /WX"
- name: "gcc-7 amd64"
compiler: gcc
=====================================
simde/simde-common.h
=====================================
@@ -458,6 +458,13 @@ HEDLEY_STATIC_ASSERT(sizeof(simde_float64) == 8, "Unable to find 64-bit floating
# define SIMDE_TAUTOLOGICAL_COMPARE_(expr) (expr)
#endif
+#if \
+ defined(HEDLEY_MSVC_VERSION)
+# define SIMDE_DIAGNOSTIC_DISABLE_NON_CONSTANT_AGGREGATE_INITIALIZER_ __pragma(warning(disable:4204))
+#else
+# define SIMDE_DIAGNOSTIC_DISABLE_NON_CONSTANT_AGGREGATE_INITIALIZER_
+#endif
+
#if \
HEDLEY_HAS_WARNING("-Wconditional-uninitialized")
# define SIMDE_DIAGNOSTIC_DISABLE_CONDITIONAL_UNINITIALIZED_ _Pragma("clang diagnostic ignored \"-Wconditional-uninitialized\"")
@@ -484,7 +491,8 @@ HEDLEY_STATIC_ASSERT(sizeof(simde_float64) == 8, "Unable to find 64-bit floating
SIMDE_DIAGNOSTIC_DISABLE_NO_EMMS_INSTRUCTION_ \
SIMDE_DIAGNOSTIC_DISABLE_SIMD_PRAGMA_DEPRECATED_ \
SIMDE_DIAGNOSTIC_DISABLE_CONDITIONAL_UNINITIALIZED_ \
- SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL_
+ SIMDE_DIAGNOSTIC_DISABLE_FLOAT_EQUAL_ \
+ SIMDE_DIAGNOSTIC_DISABLE_NON_CONSTANT_AGGREGATE_INITIALIZER_
#if defined(__STDC_HOSTED__)
# define SIMDE_STDC_HOSTED __STDC_HOSTED__
@@ -659,6 +667,9 @@ HEDLEY_STATIC_ASSERT(sizeof(simde_float64) == 8, "Unable to find 64-bit floating
# if !HEDLEY_GCC_VERSION_CHECK(9,0,0) && defined(SIMDE_ARCH_AARCH64)
# define SIMDE_BUG_GCC_ARM_SHIFT_SCALAR
# endif
+# if defined(SIMDE_ARCH_X86) && !defined(SIMDE_ARCH_AMD64)
+# define SIMDE_BUG_GCC_94482
+# endif
# endif
# if defined(HEDLEY_EMSCRIPTEN_VERSION)
# define SIMDE_BUG_EMSCRIPTEN_MISSING_IMPL /* Placeholder for (as yet) unfiled issues. */
=====================================
simde/x86/avx.h
=====================================
@@ -826,25 +826,27 @@ SIMDE__FUNCTION_ATTRIBUTES
simde__m256
simde_mm256_set_ps (simde_float32 e7, simde_float32 e6, simde_float32 e5, simde_float32 e4,
simde_float32 e3, simde_float32 e2, simde_float32 e1, simde_float32 e0) {
- simde__m256_private r_;
-
-#if defined(SIMDE_AVX_NATIVE)
- return _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0);
-#elif defined(SIMDE_SSE_NATIVE)
- r_.m128[0] = simde_mm_set_ps(e3, e2, e1, e0);
- r_.m128[1] = simde_mm_set_ps(e7, e6, e5, e4);
-#else
- r_.f32[0] = e0;
- r_.f32[1] = e1;
- r_.f32[2] = e2;
- r_.f32[3] = e3;
- r_.f32[4] = e4;
- r_.f32[5] = e5;
- r_.f32[6] = e6;
- r_.f32[7] = e7;
-#endif
-
- return simde__m256_from_private(r_);
+ #if defined(SIMDE_AVX_NATIVE)
+ return _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0);
+ #else
+ simde__m256_private r_;
+
+ #if defined(SIMDE_SSE_NATIVE)
+ r_.m128[0] = simde_mm_set_ps(e3, e2, e1, e0);
+ r_.m128[1] = simde_mm_set_ps(e7, e6, e5, e4);
+ #else
+ r_.f32[0] = e0;
+ r_.f32[1] = e1;
+ r_.f32[2] = e2;
+ r_.f32[3] = e3;
+ r_.f32[4] = e4;
+ r_.f32[5] = e5;
+ r_.f32[6] = e6;
+ r_.f32[7] = e7;
+ #endif
+
+ return simde__m256_from_private(r_);
+ #endif
}
#if defined(SIMDE_AVX_ENABLE_NATIVE_ALIASES)
# define _mm256_set_ps(e7, e6, e5, e4, e3, e2, e1, e0) \
@@ -1575,7 +1577,8 @@ simde_mm256_castpd256_pd128 (simde__m256d a) {
#if defined(SIMDE_AVX_NATIVE)
return _mm256_castpd256_pd128(a);
#else
- return simde__m256d_to_private(a).m128d[0];
+ simde__m256d_private a_ = simde__m256d_to_private(a);
+ return a_.m128d[0];
#endif
}
#if defined(SIMDE_AVX_ENABLE_NATIVE_ALIASES)
@@ -1606,7 +1609,8 @@ simde_mm256_castps256_ps128 (simde__m256 a) {
#if defined(SIMDE_AVX_NATIVE)
return _mm256_castps256_ps128(a);
#else
- return simde__m256_to_private(a).m128[0];
+ simde__m256_private a_ = simde__m256_to_private(a);
+ return a_.m128[0];
#endif
}
#if defined(SIMDE_AVX_ENABLE_NATIVE_ALIASES)
@@ -1637,7 +1641,8 @@ simde_mm256_castsi256_si128 (simde__m256i a) {
#if defined(SIMDE_AVX_NATIVE)
return _mm256_castsi256_si128(a);
#else
- return simde__m256i_to_private(a).m128i[0];
+ simde__m256i_private a_ = simde__m256i_to_private(a);
+ return a_.m128i[0];
#endif
}
#if defined(SIMDE_AVX_ENABLE_NATIVE_ALIASES)
@@ -2241,6 +2246,9 @@ simde_mm256_cmp_pd (simde__m256d a, simde__m256d b, const int imm8)
case SIMDE_CMP_TRUE_US:
r_.i32f = ~(r_.i32f ^ r_.i32f);
break;
+ default:
+ HEDLEY_UNREACHABLE();
+ break;
}
#else
SIMDE__VECTORIZE
@@ -2354,6 +2362,9 @@ simde_mm256_cmp_pd (simde__m256d a, simde__m256d b, const int imm8)
case SIMDE_CMP_TRUE_US:
r_.u64[i] = ~UINT64_C(0);
break;
+ default:
+ HEDLEY_UNREACHABLE();
+ break;
}
}
#endif
@@ -2499,6 +2510,9 @@ simde_mm256_cmp_ps (simde__m256 a, simde__m256 b, const int imm8)
case SIMDE_CMP_TRUE_US:
r_.i32 = ~(a_.i32 ^ a_.i32);
break;
+ default:
+ HEDLEY_UNREACHABLE();
+ break;
}
#else
SIMDE__VECTORIZE
@@ -2616,6 +2630,9 @@ simde_mm256_cmp_ps (simde__m256 a, simde__m256 b, const int imm8)
case SIMDE_CMP_TRUE_US:
r_.u32[i] = ~UINT32_C(0);
break;
+ default:
+ HEDLEY_UNREACHABLE();
+ break;
}
}
#endif
@@ -2879,7 +2896,8 @@ SIMDE__FUNCTION_ATTRIBUTES
simde__m128d
simde_mm256_extractf128_pd (simde__m256d a, const int imm8)
HEDLEY_REQUIRE_MSG((imm8 & 1) == imm8, "imm8 must be 0 or 1") {
- return simde__m256d_to_private(a).m128d[imm8];
+ simde__m256d_private a_ = simde__m256d_to_private(a);
+ return a_.m128d[imm8];
}
#if defined(SIMDE_AVX_NATIVE)
# define simde_mm256_extractf128_pd(a, imm8) _mm256_extractf128_pd(a, imm8)
@@ -2892,7 +2910,8 @@ SIMDE__FUNCTION_ATTRIBUTES
simde__m128
simde_mm256_extractf128_ps (simde__m256 a, const int imm8)
HEDLEY_REQUIRE_MSG((imm8 & 1) == imm8, "imm8 must be 0 or 1") {
- return simde__m256_to_private(a).m128[imm8];
+ simde__m256_private a_ = simde__m256_to_private(a);
+ return a_.m128[imm8];
}
#if defined(SIMDE_AVX_NATIVE)
# define simde_mm256_extractf128_ps(a, imm8) _mm256_extractf128_ps(a, imm8)
@@ -2905,7 +2924,8 @@ SIMDE__FUNCTION_ATTRIBUTES
simde__m128i
simde_mm256_extractf128_si256 (simde__m256i a, const int imm8)
HEDLEY_REQUIRE_MSG((imm8 & 1) == imm8, "imm8 must be 0 or 1") {
- return simde__m256i_to_private(a).m128i[imm8];
+ simde__m256i_private a_ = simde__m256i_to_private(a);
+ return a_.m128i[imm8];
}
#if defined(SIMDE_AVX_NATIVE)
# define simde_mm256_extractf128_si256(a, imm8) _mm256_extractf128_si256(a, imm8)
@@ -3179,7 +3199,8 @@ simde__m256i simde_mm256_insertf128_si256(simde__m256i a, simde__m128i b, int im
SIMDE__FUNCTION_ATTRIBUTES
int32_t
simde_mm256_extract_epi32 (simde__m256i a, const int index) {
- return simde__m256i_to_private(a).i32[index];
+ simde__m256i_private a_ = simde__m256i_to_private(a);
+ return a_.i32[index];
}
#if defined(SIMDE_AVX_ENABLE_NATIVE_ALIASES)
# define _mm256_extract_epi32(a, index) simde_mm256_extract_epi32(a, index)
@@ -3188,7 +3209,8 @@ simde_mm256_extract_epi32 (simde__m256i a, const int index) {
SIMDE__FUNCTION_ATTRIBUTES
int64_t
simde_mm256_extract_epi64 (simde__m256i a, const int index) {
- return simde__m256i_to_private(a).i64[index];
+ simde__m256i_private a_ = simde__m256i_to_private(a);
+ return a_.i64[index];
}
#if defined(SIMDE_AVX_ENABLE_NATIVE_ALIASES)
# define _mm256_extract_epi64(a, index) simde_mm256_extract_epi64(a, index)
@@ -4146,6 +4168,9 @@ simde_mm256_round_ps (simde__m256 a, const int rounding) {
case SIMDE_MM_FROUND_TO_ZERO:
r_.f32[i] = truncf(a_.f32[i]);
break;
+ default:
+ HEDLEY_UNREACHABLE();
+ break;
}
}
#else
@@ -4183,6 +4208,9 @@ simde_mm256_round_pd (simde__m256d a, const int rounding) {
case SIMDE_MM_FROUND_TO_ZERO:
r_.f64[i] = trunc(a_.f64[i]);
break;
+ default:
+ HEDLEY_UNREACHABLE();
+ break;
}
}
#else
=====================================
simde/x86/avx2.h
=====================================
@@ -1062,7 +1062,8 @@ SIMDE__FUNCTION_ATTRIBUTES
int
simde_mm256_extract_epi8 (simde__m256i a, const int index)
HEDLEY_REQUIRE_MSG((index & 31) == index, "index must be in range [0, 31]"){
- return simde__m256i_to_private(a).i8[index];
+ simde__m256i_private a_ = simde__m256i_to_private(a);
+ return a_.i8[index];
}
#if defined(SIMDE_AVX2_ENABLE_NATIVE_ALIASES)
# define _mm256_extract_epi8(a, index) simde_mm256_extract_epi8(a, index)
@@ -1072,7 +1073,8 @@ SIMDE__FUNCTION_ATTRIBUTES
int
simde_mm256_extract_epi16 (simde__m256i a, const int index)
HEDLEY_REQUIRE_MSG((index & 0xf) == index, "index must be in range [0, 15]") {
- return simde__m256i_to_private(a).i16[index];
+ simde__m256i_private a_ = simde__m256i_to_private(a);
+ return a_.i16[index];
}
#if defined(SIMDE_AVX2_ENABLE_NATIVE_ALIASES)
# define _mm256_extract_epi16(a, index) simde_mm256_extract_epi16(a, index)
@@ -1082,7 +1084,8 @@ SIMDE__FUNCTION_ATTRIBUTES
simde__m128i
simde_mm256_extracti128_si256 (simde__m256i a, const int imm8)
HEDLEY_REQUIRE_MSG((imm8 & 1) == imm8, "imm8 must be 0 or 1") {
- return simde__m256i_to_private(a).m128i[imm8];
+ simde__m256i_private a_ = simde__m256i_to_private(a);
+ return a_.m128i[imm8];
}
#if defined(SIMDE_AVX2_NATIVE)
# define simde_mm256_extracti128_si256(a, imm8) _mm256_extracti128_si256(a, imm8)
=====================================
simde/x86/avx512f.h
=====================================
@@ -467,7 +467,8 @@ simde_mm512_castpd512_pd128 (simde__m512d a) {
#if defined(SIMDE_AVX512F_NATIVE)
return _mm512_castpd512_pd128(a);
#else
- return simde__m512d_to_private(a).m128d[0];
+ simde__m512d_private a_ = simde__m512d_to_private(a);
+ return a_.m128d[0];
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
@@ -480,7 +481,8 @@ simde_mm512_castpd512_pd256 (simde__m512d a) {
#if defined(SIMDE_AVX512F_NATIVE)
return _mm512_castpd512_pd256(a);
#else
- return simde__m512d_to_private(a).m256d[0];
+ simde__m512d_private a_ = simde__m512d_to_private(a);
+ return a_.m256d[0];
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
@@ -523,7 +525,8 @@ simde_mm512_castps512_ps128 (simde__m512 a) {
#if defined(SIMDE_AVX512F_NATIVE)
return _mm512_castps512_ps128(a);
#else
- return simde__m512_to_private(a).m128[0];
+ simde__m512_private a_ = simde__m512_to_private(a);
+ return a_.m128[0];
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
@@ -536,7 +539,8 @@ simde_mm512_castps512_ps256 (simde__m512 a) {
#if defined(SIMDE_AVX512F_NATIVE)
return _mm512_castps512_ps256(a);
#else
- return simde__m512_to_private(a).m256[0];
+ simde__m512_private a_ = simde__m512_to_private(a);
+ return a_.m256[0];
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
@@ -579,7 +583,8 @@ simde_mm512_castsi512_si128 (simde__m512i a) {
#if defined(SIMDE_AVX512F_NATIVE)
return _mm512_castsi512_si128(a);
#else
- return simde__m512i_to_private(a).m128i[0];
+ simde__m512i_private a_ = simde__m512i_to_private(a);
+ return a_.m128i[0];
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
@@ -592,7 +597,8 @@ simde_mm512_castsi512_si256 (simde__m512i a) {
#if defined(SIMDE_AVX512F_NATIVE)
return _mm512_castsi512_si256(a);
#else
- return simde__m512i_to_private(a).m256i[0];
+ simde__m512i_private a_ = simde__m512i_to_private(a);
+ return a_.m256i[0];
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
@@ -1013,7 +1019,7 @@ simde_mm512_set1_epi8 (int8_t a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_set_epi8(a) simde_mm512_set_epi8(a)
+# define _mm512_set1_epi8(a) simde_mm512_set1_epi8(a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1033,7 +1039,7 @@ simde_mm512_set1_epi16 (int16_t a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_set_epi16(a) simde_mm512_set_epi16(a)
+# define _mm512_set1_epi16(a) simde_mm512_set1_epi16(a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1053,7 +1059,7 @@ simde_mm512_set1_epi32 (int32_t a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_set_epi32(a) simde_mm512_set_epi32(a)
+# define _mm512_set1_epi32(a) simde_mm512_set1_epi32(a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1073,7 +1079,7 @@ simde_mm512_set1_epi64 (int64_t a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_set_epi64(a) simde_mm512_set_epi64(a)
+# define _mm512_set1_epi64(a) simde_mm512_set1_epi64(a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1145,7 +1151,7 @@ simde_mm512_set1_ps (simde_float32 a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_set_ps(a) simde_mm512_set_ps(a)
+# define _mm512_set1_ps(a) simde_mm512_set1_ps(a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1165,7 +1171,7 @@ simde_mm512_set1_pd (simde_float64 a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_set_pd(a) simde_mm512_set_pd(a)
+# define _mm512_set1_pd(a) simde_mm512_set1_pd(a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1257,7 +1263,7 @@ simde_mm512_mask_mov_epi32(simde__m512i src, simde__mmask16 k, simde__m512i a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_maskz_mov_epi32(src, k, a) simde_mm512_maskz_mov_epi32(src, k, a)
+# define _mm512_mask_mov_epi32(src, k, a) simde_mm512_mask_mov_epi32(src, k, a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1280,7 +1286,7 @@ simde_mm512_mask_mov_epi64(simde__m512i src, simde__mmask8 k, simde__m512i a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_maskz_mov_epi64(src, k, a) simde_mm512_maskz_mov_epi64(src, k, a)
+# define _mm512_mask_mov_epi64(src, k, a) simde_mm512_mask_mov_epi64(src, k, a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1303,7 +1309,7 @@ simde_mm512_mask_mov_ps(simde__m512 src, simde__mmask16 k, simde__m512 a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_maskz_mov_ps(src, k, a) simde_mm512_maskz_mov_ps(src, k, a)
+# define _mm512_mask_mov_ps(src, k, a) simde_mm512_mask_mov_ps(src, k, a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1326,7 +1332,7 @@ simde_mm512_mask_mov_pd(simde__m512d src, simde__mmask8 k, simde__m512d a) {
#endif
}
#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
-# define _mm512_maskz_mov_pd(src, k, a) simde_mm512_maskz_mov_pd(src, k, a)
+# define _mm512_mask_mov_pd(src, k, a) simde_mm512_mask_mov_pd(src, k, a)
#endif
SIMDE__FUNCTION_ATTRIBUTES
@@ -1481,6 +1487,22 @@ simde__m512i_private_to_mmask16 (simde__m512i_private a) {
#endif
}
+SIMDE__FUNCTION_ATTRIBUTES
+simde__mmask8
+simde__m512i_private_to_mmask8 (simde__m512i_private a) {
+ #if defined(SIMDE_AVX512F_NATIVE)
+ HEDLEY_UNREACHABLE_RETURN(0);
+ #else
+ simde__mmask8 r = 0;
+ SIMDE__VECTORIZE_REDUCTION(|:r)
+ for (size_t i = 0 ; i < (sizeof(a.i64) / sizeof(a.i64[0])) ; i++) {
+ r |= !!(a.i64[i]) << i;
+ }
+
+ return r;
+ #endif
+}
+
SIMDE__FUNCTION_ATTRIBUTES
simde__m512i
simde_mm512_and_si512 (simde__m512i a, simde__m512i b) {
@@ -1669,6 +1691,28 @@ simde_mm512_mask_cmpeq_epi32_mask (simde__mmask16 k1, simde__m512i a, simde__m51
# define _mm512_mask_cmpeq_epi32_mask(k1, a, b) simde_mm512_mask_cmpeq_epi32_mask(k1, a, b)
#endif
+SIMDE__FUNCTION_ATTRIBUTES
+simde__mmask8
+simde_mm512_mask_cmpeq_epi64_mask (simde__mmask8 k1, simde__m512i a, simde__m512i b) {
+ #if defined(SIMDE_AVX512F_NATIVE)
+ return _mm512_mask_cmpeq_epi64_mask(k1, a, b);
+ #else
+ simde__m512i_private
+ r_,
+ a_ = simde__m512i_to_private(a),
+ b_ = simde__m512i_to_private(b);
+
+ for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
+ r_.m256i[i] = simde_mm256_cmpeq_epi64(a_.m256i[i], b_.m256i[i]);
+ }
+
+ return simde__m512i_private_to_mmask8(r_) & k1;
+ #endif
+}
+#if defined(SIMDE_AVX512F_ENABLE_NATIVE_ALIASES)
+# define _mm512_mask_cmpeq_epi64_mask(k1, a, b) simde_mm512_mask_cmpeq_epi64_mask(k1, a, b)
+#endif
+
SIMDE__FUNCTION_ATTRIBUTES
simde__m512i
simde_mm512_cvtepi8_epi32 (simde__m128i a) {
=====================================
simde/x86/sse.h
=====================================
@@ -967,8 +967,8 @@ simde_mm_cmpunord_ss (simde__m128 a, simde__m128 b) {
#if defined(simde_isnanf)
r_.u32[0] = (simde_isnanf(a_.f32[0]) || simde_isnanf(b_.f32[0])) ? ~UINT32_C(0) : UINT32_C(0);
SIMDE__VECTORIZE
- for (size_t i = 1 ; i < (sizeof(r_.f32) / sizeof(r_.f32[0])) ; i++) {
- r_.f32[i] = a_.f32[i];
+ for (size_t i = 1 ; i < (sizeof(r_.u32) / sizeof(r_.u32[0])) ; i++) {
+ r_.u32[i] = a_.u32[i];
}
#else
HEDLEY_UNREACHABLE();
@@ -1751,7 +1751,8 @@ SIMDE__FUNCTION_ATTRIBUTES
int16_t
simde_mm_extract_pi16 (simde__m64 a, const int imm8)
HEDLEY_REQUIRE_MSG((imm8 & 3) == imm8, "imm8 must be in range [0, 3]") {
- return simde__m64_to_private(a).i16[imm8];
+ simde__m64_private a_ = simde__m64_to_private(a);
+ return a_.i16[imm8];
}
#if defined(SIMDE_SSE_NATIVE) && defined(SIMDE_ARCH_X86_MMX) && !defined(HEDLEY_PGI_VERSION)
# if HEDLEY_HAS_WARNING("-Wvector-conversion")
=====================================
simde/x86/sse2.h
=====================================
@@ -1924,7 +1924,8 @@ simde_mm_cvtsd_f64 (simde__m128d a) {
#if defined(SIMDE_SSE2_NATIVE) && !defined(__PGI)
return _mm_cvtsd_f64(a);
#else
- return simde__m128d_to_private(a).f64[0];
+ simde__m128d_private a_ = simde__m128d_to_private(a);
+ return a_.f64[0];
#endif
}
#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
@@ -2241,7 +2242,8 @@ simde_mm_cvtsd_si32 (simde__m128d a) {
#if defined(SIMDE_SSE2_NATIVE)
return _mm_cvtsd_si32(a);
#else
- return (int32_t) (simde__m128d_to_private(a).f64[0]);
+ simde__m128d_private a_ = simde__m128d_to_private(a);
+ return SIMDE_CONVERT_FTOI(int32_t, a_.f64[0]);
#endif
}
#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
@@ -2258,7 +2260,8 @@ simde_mm_cvtsd_si64 (simde__m128d a) {
return _mm_cvtsd_si64(a);
#endif
#else
- return (int32_t) (simde__m128d_to_private(a).f64[0]);
+ simde__m128d_private a_ = simde__m128d_to_private(a);
+ return SIMDE_CONVERT_FTOI(int64_t, a_.f64[0]);
#endif
}
#define simde_mm_cvtsd_si64x(a) simde_mm_cvtsd_si64(a)
@@ -2321,7 +2324,8 @@ simde_mm_cvtsi128_si64 (simde__m128i a) {
return _mm_cvtsi128_si64(a);
#endif
#else
- return simde__m128i_to_private(a).i64[0];
+ simde__m128i_private a_ = simde__m128i_to_private(a);
+ return a_.i64[0];
#endif
}
#define simde_mm_cvtsi128_si64x(a) simde_mm_cvtsi128_si64(a)
@@ -2528,7 +2532,8 @@ simde_mm_cvttsd_si32 (simde__m128d a) {
#if defined(SIMDE_SSE2_NATIVE)
return _mm_cvttsd_si32(a);
#else
- return SIMDE_CONVERT_FTOI(int32_t, simde__m128d_to_private(a).f64[0]);
+ simde__m128d_private a_ = simde__m128d_to_private(a);
+ return SIMDE_CONVERT_FTOI(int32_t, a_.f64[0]);
#endif
}
#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
@@ -2545,7 +2550,8 @@ simde_mm_cvttsd_si64 (simde__m128d a) {
return _mm_cvttsd_si64x(a);
#endif
#else
- return SIMDE_CONVERT_FTOI(int64_t, simde__m128d_to_private(a).f64[0]);
+ simde__m128d_private a_ = simde__m128d_to_private(a);
+ return SIMDE_CONVERT_FTOI(int64_t, a_.f64[0]);
#endif
}
#define simde_mm_cvttsd_si64x(a) simde_mm_cvttsd_si64(a)
@@ -2610,7 +2616,8 @@ SIMDE__FUNCTION_ATTRIBUTES
int32_t
simde_mm_extract_epi16 (simde__m128i a, const int imm8)
HEDLEY_REQUIRE_MSG((imm8 & 7) == imm8, "imm8 must be in range [0, 7]") {
- return simde__m128i_to_private(a).u16[imm8 & 7];
+ simde__m128i_private a_ = simde__m128i_to_private(a);
+ return a_.u16[imm8 & 7];
}
#if defined(SIMDE_SSE2_NATIVE) && (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(4,6,0))
# define simde_mm_extract_epi16(a, imm8) _mm_extract_epi16(a, imm8)
@@ -2791,18 +2798,18 @@ simde_mm_loadl_pd (simde__m128d a, simde_float64 const* mem_addr) {
SIMDE__FUNCTION_ATTRIBUTES
simde__m128d
simde_mm_loadr_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) {
- simde__m128d_private r_;
-
simde_assert_aligned(16, mem_addr);
#if defined(SIMDE_SSE2_NATIVE)
return _mm_loadr_pd(mem_addr);
#else
+ simde__m128d_private r_;
+
r_.f64[0] = mem_addr[1];
r_.f64[1] = mem_addr[0];
-#endif
return simde__m128d_from_private(r_);
+#endif
}
#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
# define _mm_loadr_pd(mem_addr) simde_mm_loadr_pd(mem_addr)
@@ -2828,17 +2835,19 @@ simde_mm_loadu_pd (simde_float64 const mem_addr[HEDLEY_ARRAY_PARAM(2)]) {
SIMDE__FUNCTION_ATTRIBUTES
simde__m128i
simde_mm_loadu_si128 (simde__m128i const* mem_addr) {
- simde__m128i_private r_;
+ #if defined(SIMDE_SSE2_NATIVE)
+ return _mm_loadu_si128(HEDLEY_STATIC_CAST(__m128i const*, mem_addr));
+ #else
+ simde__m128i_private r_;
-#if defined(SIMDE_SSE2_NATIVE)
- return _mm_loadu_si128(HEDLEY_STATIC_CAST(__m128i const*, mem_addr));
-#elif defined(SIMDE_SSE2_NEON)
- r_.neon_i32 = vld1q_s32((int32_t const*) mem_addr);
-#else
- simde_memcpy(&r_, mem_addr, sizeof(r_));
-#endif
+ #if defined(SIMDE_SSE2_NEON)
+ r_.neon_i32 = vld1q_s32((int32_t const*) mem_addr);
+ #else
+ simde_memcpy(&r_, mem_addr, sizeof(r_));
+ #endif
- return simde__m128i_from_private(r_);
+ return simde__m128i_from_private(r_);
+ #endif
}
#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
# define _mm_loadu_si128(mem_addr) simde_mm_loadu_si128(mem_addr)
@@ -4007,7 +4016,8 @@ simde_mm_set1_epi64 (simde__m64 a) {
#if defined(SIMDE_SSE2_NATIVE) && defined(SIMDE_ARCH_X86_MMX)
return _mm_set1_epi64(a);
#else
- return simde_mm_set1_epi64x(simde__m64_to_private(a).i64[0]);
+ simde__m64_private a_ = simde__m64_to_private(a);
+ return simde_mm_set1_epi64x(a_.i64[0]);
#endif
}
#if defined(SIMDE_SSE2_ENABLE_NATIVE_ALIASES)
=====================================
simde/x86/sse4.1.h
=====================================
@@ -1059,12 +1059,29 @@ SIMDE__FUNCTION_ATTRIBUTES
simde__m128i
simde_mm_insert_epi64 (simde__m128i a, int64_t i, const int imm8)
HEDLEY_REQUIRE_MSG((imm8 & 1) == imm8, "imm8 must be 0 or 1") {
- simde__m128i_private
- r_ = simde__m128i_to_private(a);
+ #if defined(SIMDE_BUG_GCC_94482)
+ simde__m128i_private
+ a_ = simde__m128i_to_private(a);
+
+ switch(imm8) {
+ case 0:
+ return simde_mm_set_epi64x(a_.i64[1], i);
+ break;
+ case 1:
+ return simde_mm_set_epi64x(i, a_.i64[0]);
+ break;
+ default:
+ HEDLEY_UNREACHABLE();
+ break;
+ }
+ #else
+ simde__m128i_private
+ r_ = simde__m128i_to_private(a);
- r_.i64[imm8] = i;
+ r_.i64[imm8] = i;
- return simde__m128i_from_private(r_);
+ return simde__m128i_from_private(r_);
+ #endif
}
#if defined(SIMDE_SSE4_1_NATIVE) && defined(SIMDE_ARCH_AMD64)
# define simde_mm_insert_epi64(a, i, imm8) _mm_insert_epi64(a, i, imm8)
=====================================
test/run-tests.h
=====================================
@@ -10,6 +10,13 @@
SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
+#if defined(HEDLEY_MSVC_VERSION)
+/* Unused function(s) */
+#pragma warning(disable:4505)
+#endif
+
+HEDLEY_DIAGNOSTIC_PUSH
+
#define SIMDE_TESTS_CONCAT3_EX(a, b, c) a##b##c
#define SIMDE_TESTS_CONCAT3(a, b, c) SIMDE_TESTS_CONCAT3_EX(a, b, c)
@@ -235,4 +242,19 @@ static void random_f64v(size_t nmemb, simde_float64 v[HEDLEY_ARRAY_PARAM(nmemb)]
HEDLEY_END_C_DECLS
+HEDLEY_DIAGNOSTIC_POP
+
+#if HEDLEY_HAS_WARNING("-Wpadded")
+# pragma clang diagnostic ignored "-Wpadded"
+#elif defined(HEDLEY_MSVC_VERSION)
+# pragma warning(disable:4324)
+#endif
+
+#if defined(HEDLEY_MSVC_VERSION)
+ /* nonstandard extension used : non-lvalue array converted to pointer */
+ #pragma warning(disable:4223)
+ /* Conditional expression is a constant */
+ #pragma warning(disable:4127)
+#endif
+
#endif /* !defined(SIMDE_RUN_TESTS_H) */
=====================================
test/x86/avx.c
=====================================
@@ -1927,9 +1927,9 @@ test_simde_mm256_castpd128_pd256(const MunitParameter params[], void* data) {
};
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
- simde__m256d r = simde_mm256_castpd128_pd256(test_vec[i].a);
- simde_assert_m128d_equal(simde__m256d_to_private(r).m128d[0],
- simde__m256d_to_private(test_vec[i].r).m128d[0]);
+ simde__m256d_private r = simde__m256d_to_private(simde_mm256_castpd128_pd256(test_vec[i].a));
+ simde__m256d_private expected = simde__m256d_to_private(test_vec[i].r);
+ simde_assert_m128d_equal(r.m128d[0], expected.m128d[0]);
}
return MUNIT_OK;
=====================================
test/x86/avx512f.c
=====================================
@@ -1404,7 +1404,7 @@ test_simde_mm512_mask_test_epi32_mask(const MunitParameter params[], void* data)
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
simde__mmask16 r = simde_mm512_mask_test_epi32_mask(test_vec[i].k, test_vec[i].a, test_vec[i].b);
- munit_assert_uint16(r, ==, test_vec[i].r);
+ munit_assert_uint16(HEDLEY_STATIC_CAST(uint16_t, r), ==, HEDLEY_STATIC_CAST(uint16_t, test_vec[i].r));
}
return MUNIT_OK;
@@ -2201,7 +2201,108 @@ test_simde_mm512_mask_cmpeq_epi32_mask(const MunitParameter params[], void* data
for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
simde__mmask16 r = simde_mm512_mask_cmpeq_epi32_mask(test_vec[i].k, test_vec[i].a, test_vec[i].b);
- munit_assert_uint16(r, ==, test_vec[i].r);
+ munit_assert_uint16(HEDLEY_STATIC_CAST(uint16_t, r), ==, HEDLEY_STATIC_CAST(uint16_t, test_vec[i].r));
+ }
+
+ return MUNIT_OK;
+}
+
+static MunitResult
+test_simde_mm512_mask_cmpeq_epi64_mask(const MunitParameter params[], void* data) {
+ (void) params;
+ (void) data;
+
+ const struct {
+ simde__mmask8 k;
+ simde__m512i a;
+ simde__m512i b;
+ simde__mmask8 r;
+ } test_vec[8] = {
+ { UINT8_C( 90),
+ simde_mm512_set_epi64(INT64_C( 7722926897436765530), INT64_C( 7338279138551748064),
+ INT64_C( 8433308126101200079), INT64_C(-4390305748733976547),
+ INT64_C(-1482589068035252753), INT64_C(-5002011091694476743),
+ INT64_C( 5809674310022718254), INT64_C( 7620249298233351482)),
+ simde_mm512_set_epi64(INT64_C( 7722926897436765530), INT64_C( 7338279138551748064),
+ INT64_C(-2656726859984743367), INT64_C(-4390305748733976547),
+ INT64_C(-1482589068035252753), INT64_C(-5269390469191050553),
+ INT64_C( 5809674310022718254), INT64_C( 7620249298233351482)),
+ UINT8_C( 90) },
+ { UINT8_C(178),
+ simde_mm512_set_epi64(INT64_C(-8806453660480970182), INT64_C(-2722914847628644365),
+ INT64_C( 2171146127585219679), INT64_C(-7200523266853707115),
+ INT64_C( 8505301695237968355), INT64_C( 6373940775215479358),
+ INT64_C( 8209357864908427195), INT64_C( -995665125730760835)),
+ simde_mm512_set_epi64(INT64_C(-8806453660480970182), INT64_C(-2722914847628644365),
+ INT64_C(-1180134256156200317), INT64_C(-7200523266853707115),
+ INT64_C(-1610604796376715795), INT64_C( 5419019224867820225),
+ INT64_C( 8209357864908427195), INT64_C( -995665125730760835)),
+ UINT8_C(146) },
+ { UINT8_C(171),
+ simde_mm512_set_epi64(INT64_C(-6245801519083893310), INT64_C(-7866373458730819532),
+ INT64_C(-5627757407772356197), INT64_C(-2425546480980122794),
+ INT64_C(-8451301604567613199), INT64_C( 1369383717682198649),
+ INT64_C( -532343328754521574), INT64_C(-1062878680437210584)),
+ simde_mm512_set_epi64(INT64_C(-9163399881020056955), INT64_C(-2992244142829238392),
+ INT64_C( -213476403626539965), INT64_C(-8591297333400286921),
+ INT64_C(-8451301604567613199), INT64_C(-8139768780594538635),
+ INT64_C(-4714070518405120331), INT64_C(-1062878680437210584)),
+ UINT8_C( 9) },
+ { UINT8_C( 28),
+ simde_mm512_set_epi64(INT64_C( 7845956693704412298), INT64_C(-5781930833336581955),
+ INT64_C( 2851517750261041799), INT64_C(-5814293521236182366),
+ INT64_C( 2292150971239308783), INT64_C( 2594053186857735013),
+ INT64_C( 7307535341641173075), INT64_C(-4427478291595527940)),
+ simde_mm512_set_epi64(INT64_C( 536264388241191871), INT64_C(-5781930833336581955),
+ INT64_C( 2851517750261041799), INT64_C( 1349842462394812975),
+ INT64_C( 2292150971239308783), INT64_C( 2594053186857735013),
+ INT64_C( 7307535341641173075), INT64_C(-4427478291595527940)),
+ UINT8_C( 12) },
+ { UINT8_C(248),
+ simde_mm512_set_epi64(INT64_C( 4900816215694077255), INT64_C(-2732029741423656661),
+ INT64_C( 1082977534221618055), INT64_C(-3092044493389993636),
+ INT64_C(-4299277917890019767), INT64_C(-2055775203132417874),
+ INT64_C( -778633101599852237), INT64_C( -563223173848121636)),
+ simde_mm512_set_epi64(INT64_C( 7049304296219110648), INT64_C(-2732029741423656661),
+ INT64_C( 7088083428992159722), INT64_C(-3092044493389993636),
+ INT64_C(-4299277917890019767), INT64_C( 4225506809727089751),
+ INT64_C( -778633101599852237), INT64_C( -563223173848121636)),
+ UINT8_C( 88) },
+ { UINT8_C(171),
+ simde_mm512_set_epi64(INT64_C(-1412821155990992029), INT64_C( 4454576651901490962),
+ INT64_C(-7284760734604447652), INT64_C(-7443130466673006479),
+ INT64_C( 320054597637804434), INT64_C(-8860872372305530355),
+ INT64_C(-8428145646879978292), INT64_C(-6547252853189215611)),
+ simde_mm512_set_epi64(INT64_C(-1412821155990992029), INT64_C(-2354123670646573707),
+ INT64_C( 4506838144989822528), INT64_C(-7443130466673006479),
+ INT64_C(-5147543239321546686), INT64_C(-8860872372305530355),
+ INT64_C(-8428145646879978292), INT64_C(-6547252853189215611)),
+ UINT8_C(131) },
+ { UINT8_C( 29),
+ simde_mm512_set_epi64(INT64_C( 5675137803130124480), INT64_C( 1211541157654985046),
+ INT64_C( 8724633375562564314), INT64_C(-2760658800846254598),
+ INT64_C(-6714474269646576270), INT64_C( 3484180661422871715),
+ INT64_C( 1469796163712815354), INT64_C(-2336393240308600160)),
+ simde_mm512_set_epi64(INT64_C( 5675137803130124480), INT64_C( 1211541157654985046),
+ INT64_C(-8867413355151838495), INT64_C(-8867147959443474315),
+ INT64_C(-6714474269646576270), INT64_C( 3484180661422871715),
+ INT64_C(-7735267815657951749), INT64_C( 413036036281601883)),
+ UINT8_C( 12) },
+ { UINT8_C(211),
+ simde_mm512_set_epi64(INT64_C(-6713502673628263139), INT64_C( 1559753162601267291),
+ INT64_C( 5045660940436454371), INT64_C( 7013290440433503154),
+ INT64_C(-8475145246816690249), INT64_C(-6834826688677600633),
+ INT64_C(-2109099044497919348), INT64_C( 1351143524438105934)),
+ simde_mm512_set_epi64(INT64_C( 5625319538109918668), INT64_C( 1559753162601267291),
+ INT64_C( 5045660940436454371), INT64_C(-4654386914804892920),
+ INT64_C( 2407237530895996207), INT64_C(-6834826688677600633),
+ INT64_C( 4684210505965066200), INT64_C( 1351143524438105934)),
+ UINT8_C( 65) }
+ };
+
+ for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
+ simde__mmask8 r = simde_mm512_mask_cmpeq_epi64_mask(test_vec[i].k, test_vec[i].a, test_vec[i].b);
+ munit_assert_uint8(r, ==, test_vec[i].r);
}
return MUNIT_OK;
@@ -2577,6 +2678,7 @@ static MunitTest test_suite_tests[] = {
SIMDE_TESTS_DEFINE_TEST(mm512_andnot_si512),
SIMDE_TESTS_DEFINE_TEST(mm512_mask_cmpeq_epi32_mask),
+ SIMDE_TESTS_DEFINE_TEST(mm512_mask_cmpeq_epi64_mask),
SIMDE_TESTS_DEFINE_TEST(mm512_cvtepi8_epi32),
SIMDE_TESTS_DEFINE_TEST(mm512_cvtepi8_epi64),
=====================================
test/x86/fma.c
=====================================
@@ -27,7 +27,6 @@
#if defined(SIMDE_FMA_NATIVE) || defined(SIMDE_NO_NATIVE) || defined(SIMDE_ALWAYS_BUILD_NATIVE_TESTS)
-
static MunitResult
test_simde_mm_fmadd_pd(const MunitParameter params[], void* data) {
(void) params;
=====================================
test/x86/skel.c
=====================================
@@ -2828,3 +2828,53 @@ test_simde_mm512_mask_xxx_epi32_mask(const MunitParameter params[], void* data)
return MUNIT_OK;
}
+
+static MunitResult
+test_simde_mm512_mask_xxx_epi64_mask(const MunitParameter params[], void* data) {
+ (void) params;
+ (void) data;
+
+ const struct {
+ simde__mmask8 k;
+ simde__m512i a;
+ simde__m512i b;
+ simde__mmask8 r;
+ } test_vec[8] = {
+
+ };
+
+ printf("\n");
+ for (size_t i = 0 ; i < (sizeof(test_vec) / (sizeof(test_vec[0]))) ; i++) {
+ simde__m512i_private a, b;
+ simde__mmask8 k, r;
+
+ k = (simde__mmask8) munit_rand_int_range(0, UINT8_MAX);
+ munit_rand_memory(sizeof(a), (uint8_t*) &a);
+ munit_rand_memory(sizeof(b), (uint8_t*) &b);
+
+ r = simde_mm512_mask_xxx_epi64_mask(k, simde__m512i_from_private(a), simde__m512i_from_private(b));
+
+ printf(" { UINT8_C(%3" PRIu8 "),\n", k);
+ printf(" simde_mm512_set_epi64(INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 "),\n"
+ " INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 "),\n"
+ " INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 "),\n"
+ " INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 ")),\n",
+ a.i64[7], a.i64[6], a.i64[5], a.i64[4],
+ a.i64[3], a.i64[2], a.i64[1], a.i64[0]);
+ printf(" simde_mm512_set_epi64(INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 "),\n"
+ " INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 "),\n"
+ " INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 "),\n"
+ " INT64_C(%20" PRId64 "), INT64_C(%20" PRId64 ")),\n",
+ b.i64[7], b.i64[6], b.i64[5], b.i64[4],
+ b.i64[3], b.i64[2], b.i64[1], b.i64[0]);
+ printf(" UINT8_C(%3" PRIu8 ") },\n", r);
+ }
+ return MUNIT_FAIL;
+
+ for (size_t i = 0 ; i < (sizeof(test_vec) / sizeof(test_vec[0])); i++) {
+ simde__mmask8 r = simde_mm512_mask_xxx_epi64_mask(test_vec[i].k, test_vec[i].a, test_vec[i].b);
+ munit_assert_uint8(r, ==, test_vec[i].r);
+ }
+
+ return MUNIT_OK;
+}
=====================================
test/x86/sse.c
=====================================
@@ -26,6 +26,14 @@
#if defined(SIMDE_SSE_NATIVE) || defined(SIMDE_NO_NATIVE) || defined(SIMDE_ALWAYS_BUILD_NATIVE_TESTS)
+#if defined(HEDLEY_MSVC_VERSION)
+# pragma warning(disable:4223)
+#endif
+
+#if defined(HEDLEY_MSVC_VERSION)
+# pragma warning(disable:4324)
+#endif
+
static MunitResult
test_simde_mm_set_ps(const MunitParameter params[], void* data) {
(void) params;
=====================================
test/x86/sse2.c
=====================================
@@ -26,6 +26,10 @@
#if defined(SIMDE_SSE2_NATIVE) || defined(SIMDE_NO_NATIVE) || defined(SIMDE_ALWAYS_BUILD_NATIVE_TESTS)
+#if defined(HEDLEY_MSVC_VERSION)
+# pragma warning(disable:4324)
+#endif
+
static MunitResult
test_simde_mm_add_epi8(const MunitParameter params[], void* data) {
(void) params;
View it on GitLab: https://salsa.debian.org/med-team/simde/-/commit/aaef32f516a01b1ef0848c81ba3a1af311c902cc
--
View it on GitLab: https://salsa.debian.org/med-team/simde/-/commit/aaef32f516a01b1ef0848c81ba3a1af311c902cc
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