[med-svn] [Git][med-team/spoa][master] 2 commits: Simplify simde patch

Michael R. Crusoe gitlab at salsa.debian.org
Sun May 3 13:04:22 BST 2020



Michael R. Crusoe pushed to branch master at Debian Med / spoa


Commits:
a41beccc by Michael R. Crusoe at 2020-05-03T13:51:36+02:00
Simplify simde patch

- - - - -
c4e61ee5 by Michael R. Crusoe at 2020-05-03T14:03:12+02:00
release 3.0.2-4 to unstable

- - - - -


3 changed files:

- debian/changelog
- debian/control
- debian/patches/simde


Changes:

=====================================
debian/changelog
=====================================
@@ -1,12 +1,14 @@
-spoa (3.0.2-4) UNRELEASED; urgency=medium
+spoa (3.0.2-4) unstable; urgency=medium
 
+  * Team upload.
   * Mark libspoa{3,-dev} as Multi-Arch: same
+  * Simplify simde patch
 
   [ Etienne Mollier ]
   * Added patch for Gcc 10; assuming #959465 resolution:
     Closes: #957836
 
- -- Michael R. Crusoe <michael.crusoe at gmail.com>  Fri, 17 Apr 2020 10:10:18 +0200
+ -- Michael R. Crusoe <michael.crusoe at gmail.com>  Sun, 03 May 2020 14:02:30 +0200
 
 spoa (3.0.2-3) unstable; urgency=medium
 


=====================================
debian/control
=====================================
@@ -10,7 +10,7 @@ Build-Depends: debhelper-compat (= 12),
                libbioparser-dev (>= 2.0),
                libgtest-dev,
                zlib1g-dev,
-               libsimde-dev
+               libsimde-dev (>= 0.0.0.git.20200421)
 Standards-Version: 4.5.0
 Vcs-Browser: https://salsa.debian.org/med-team/spoa
 Vcs-Git: https://salsa.debian.org/med-team/spoa.git


=====================================
debian/patches/simde
=====================================
@@ -2,107 +2,26 @@ From: Michael R. Crusoe <michael.crusoe at gmail.com>
 Subject: Enable building on non-x86_64
 --- spoa.orig/src/simd_alignment_engine.cpp
 +++ spoa/src/simd_alignment_engine.cpp
-@@ -9,7 +9,7 @@
+@@ -9,7 +9,8 @@
  #include <limits>
  
  extern "C" {
 -    #include <immintrin.h> // AVX2 and lower
-+    #include "simde/x86/avx2.h" // AVX2 and lower
++    #define SIMDE_ENABLE_NATIVE_ALIASES
++    #include <simde/x86/avx2.h> // AVX2 and lower
  }
  
  #include "spoa/graph.hpp"
-@@ -43,31 +43,29 @@
+@@ -43,8 +44,6 @@
  template<typename T>
  struct InstructionSet;
  
 -#if defined(__AVX2__)
 -
  constexpr std::uint32_t kRegisterSize = 256;
--using __mxxxi = __m256i;
-+using __mxxxi = simde__m256i;
+ using __mxxxi = __m256i;
  
- inline __mxxxi _mmxxx_load_si(__mxxxi const* mem_addr) {
--    return _mm256_load_si256(mem_addr);
-+    return simde_mm256_load_si256(mem_addr);
- }
- 
- inline void _mmxxx_store_si(__mxxxi* mem_addr, const __mxxxi& a) {
--    _mm256_store_si256(mem_addr, a);
-+    simde_mm256_store_si256(mem_addr, a);
- }
- 
- inline __mxxxi _mmxxx_or_si(const __mxxxi& a, const __mxxxi& b) {
--    return _mm256_or_si256(a, b);
-+    return simde_mm256_or_si256(a, b);
- }
- 
- #define _mmxxx_slli_si(a, n) n < 16 ? \
--    _mm256_alignr_epi8(a, _mm256_permute2x128_si256(a, a, \
--        _MM_SHUFFLE(0, 0, 2, 0)), 16 - n) : \
--    _mm256_permute2x128_si256(a, a, _MM_SHUFFLE(0, 0, 2, 0))
-+    simde_mm256_alignr_epi8(a, simde_mm256_permute2x128_si256(a, a, \
-+        SIMDE_MM_SHUFFLE(0, 0, 2, 0)), 16 - n) : \
-+    simde_mm256_permute2x128_si256(a, a, SIMDE_MM_SHUFFLE(0, 0, 2, 0))
- 
- #define _mmxxx_srli_si(a, n) \
--    _mm256_srli_si256(_mm256_permute2x128_si256(a, a, \
--        _MM_SHUFFLE(2, 0, 0, 1)), n - 16)
-+    simde_mm256_srli_si256(simde_mm256_permute2x128_si256(a, a, \
-+        SIMDE_MM_SHUFFLE(2, 0, 0, 1)), n - 16)
- 
- template<>
- struct InstructionSet<std::int16_t> {
-@@ -77,19 +75,19 @@
-     static constexpr std::uint32_t kLSS = 2; // Left Shift Size
-     static constexpr std::uint32_t kRSS = 30; // Right Shift Size
-     static inline __mxxxi _mmxxx_add_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_add_epi16(a, b);
-+        return simde_mm256_add_epi16(a, b);
-     }
-     static inline __mxxxi _mmxxx_sub_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_sub_epi16(a, b);
-+        return simde_mm256_sub_epi16(a, b);
-     }
-     static inline __mxxxi _mmxxx_min_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_min_epi16(a, b);
-+        return simde_mm256_min_epi16(a, b);
-     }
-     static inline __mxxxi _mmxxx_max_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_max_epi16(a, b);
-+        return simde_mm256_max_epi16(a, b);
-     }
-     static inline __mxxxi _mmxxx_set1_epi(type a) {
--        return _mm256_set1_epi16(a);
-+        return simde_mm256_set1_epi16(a);
-     }
-     static inline void _mmxxx_prefix_max(__mxxxi& a, const __mxxxi* masks,
-         const __mxxxi* penalties) {
-@@ -113,19 +111,19 @@
-     static constexpr std::uint32_t kLSS = 4;
-     static constexpr std::uint32_t kRSS = 28;
-     static inline __mxxxi _mmxxx_add_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_add_epi32(a, b);
-+        return simde_mm256_add_epi32(a, b);
-     }
-     static inline __mxxxi _mmxxx_sub_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_sub_epi32(a, b);
-+        return simde_mm256_sub_epi32(a, b);
-     }
-     static inline __mxxxi _mmxxx_min_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_min_epi32(a, b);
-+        return simde_mm256_min_epi32(a, b);
-     }
-     static inline __mxxxi _mmxxx_max_epi(const __mxxxi& a, const __mxxxi& b) {
--        return _mm256_max_epi32(a, b);
-+        return simde_mm256_max_epi32(a, b);
-     }
-     static inline __mxxxi _mmxxx_set1_epi(type a) {
--        return _mm256_set1_epi32(a);
-+        return simde_mm256_set1_epi32(a);
-     }
-     static inline void _mmxxx_prefix_max(__mxxxi& a, const __mxxxi* masks,
-         const __mxxxi* penalties) {
-@@ -139,99 +137,6 @@
+@@ -139,99 +138,6 @@
      }
  };
  
@@ -202,7 +121,7 @@ Subject: Enable building on non-x86_64
  template<typename T>
  void _mmxxx_print(const __mxxxi& a) {
  
-@@ -288,28 +193,16 @@
+@@ -288,28 +194,16 @@
      return -1;
  }
  
@@ -231,7 +150,7 @@ Subject: Enable building on non-x86_64
      std::vector<std::uint32_t> node_id_to_rank;
  
      std::unique_ptr<__mxxxi[]> sequence_profile_storage;
-@@ -342,7 +235,6 @@
+@@ -342,7 +236,6 @@
              penalties(nullptr) {
      }
  
@@ -239,7 +158,7 @@ Subject: Enable building on non-x86_64
  };
  
  SimdAlignmentEngine::SimdAlignmentEngine(AlignmentType type,
-@@ -358,8 +250,6 @@
+@@ -358,8 +251,6 @@
  void SimdAlignmentEngine::prealloc(std::uint32_t max_sequence_size,
      std::uint32_t alphabet_size) {
  
@@ -248,7 +167,7 @@ Subject: Enable building on non-x86_64
      std::uint32_t longest_path = max_sequence_size * (alphabet_size + 1) + 1 +
          InstructionSet<std::int16_t>::kNumVar;
  
-@@ -374,14 +264,11 @@
+@@ -374,14 +265,11 @@
              alphabet_size * max_sequence_size, alphabet_size);
      }
  
@@ -263,7 +182,7 @@ Subject: Enable building on non-x86_64
      if (pimpl_->node_id_to_rank.size() < matrix_height - 1) {
          pimpl_->node_id_to_rank.resize(matrix_height - 1, 0);
      }
-@@ -453,7 +340,6 @@
+@@ -453,7 +341,6 @@
          pimpl_->penalties_storage = std::unique_ptr<__mxxxi[]>(storage);
      }
  
@@ -271,7 +190,7 @@ Subject: Enable building on non-x86_64
  }
  
  template<typename T>
-@@ -461,8 +347,6 @@
+@@ -461,8 +348,6 @@
      const std::unique_ptr<Graph>& graph, std::uint32_t normal_matrix_width,
      std::uint32_t matrix_width, std::uint32_t matrix_height) noexcept {
  
@@ -280,7 +199,7 @@ Subject: Enable building on non-x86_64
      std::int32_t padding_penatly = -1 * std::max(std::max(abs(m_), abs(n_)),
          std::max(abs(g_), abs(q_)));
  
-@@ -643,7 +527,6 @@
+@@ -643,7 +528,6 @@
              break;
      }
  
@@ -288,7 +207,7 @@ Subject: Enable building on non-x86_64
  }
  
  Alignment SimdAlignmentEngine::align(const char* sequence,
-@@ -653,8 +536,6 @@
+@@ -653,8 +537,6 @@
          return Alignment();
      }
  
@@ -297,7 +216,7 @@ Subject: Enable building on non-x86_64
      std::uint32_t longest_path = graph->nodes().size() + 1 + sequence_size +
          InstructionSet<std::int16_t>::kNumVar;
  
-@@ -680,19 +561,12 @@
+@@ -680,19 +562,12 @@
  
      return Alignment();
  
@@ -317,7 +236,7 @@ Subject: Enable building on non-x86_64
      std::uint32_t normal_matrix_width = sequence_size;
      std::uint32_t matrix_width = (sequence_size + (sequence_size % T::kNumVar == 0 ?
          0 : T::kNumVar - sequence_size % T::kNumVar)) / T::kNumVar;
-@@ -1027,19 +901,12 @@
+@@ -1027,19 +902,12 @@
      std::reverse(alignment.begin(), alignment.end());
      return alignment;
  
@@ -337,7 +256,7 @@ Subject: Enable building on non-x86_64
      std::uint32_t normal_matrix_width = sequence_size;
      std::uint32_t matrix_width = (sequence_size + (sequence_size % T::kNumVar == 0 ?
          0 : T::kNumVar - sequence_size % T::kNumVar)) / T::kNumVar;
-@@ -1457,19 +1324,12 @@
+@@ -1457,19 +1325,12 @@
      std::reverse(alignment.begin(), alignment.end());
      return alignment;
  
@@ -357,7 +276,7 @@ Subject: Enable building on non-x86_64
      std::uint32_t normal_matrix_width = sequence_size;
      std::uint32_t matrix_width = (sequence_size + (sequence_size % T::kNumVar == 0 ?
          0 : T::kNumVar - sequence_size % T::kNumVar)) / T::kNumVar;
-@@ -1962,11 +1822,6 @@
+@@ -1962,11 +1823,6 @@
  
      std::reverse(alignment.begin(), alignment.end());
      return alignment;



View it on GitLab: https://salsa.debian.org/med-team/spoa/-/compare/a21fbe8473e6ef9cf510ea6f98f4f3eb739302e5...c4e61ee5a1f1f5ee8a02fba18f0d12a91d309814

-- 
View it on GitLab: https://salsa.debian.org/med-team/spoa/-/compare/a21fbe8473e6ef9cf510ea6f98f4f3eb739302e5...c4e61ee5a1f1f5ee8a02fba18f0d12a91d309814
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