[Debian-med-packaging] Bug#806675: hmmer: nhmmer fails with fatal exception on armhf

Edmund Grimley Evans edmund.grimley.evans at gmail.com
Wed Dec 2 09:22:57 UTC 2015


ftp://selab.janelia.org/pub/software/hmmer3/3.1b2/Userguide.pdf says:

"""
Processor: HMMER depends on vector parallelization methods that are
supported on most modern processors. H3 requires either an
x86-compatible (IA32, IA64, or Intel64) processor that supports the
SSE2 vector instruction set, or a PowerPC processor that supports the
Altivec/VMX instruction set. SSE2 is supported on Intel processors
from Pentium 4 on, and AMD processors from K8 (Athlon 64) on; we
believe this includes almost all Intel processors since 2000 and AMD
processors since 2003. Altivec/VMX is supported on Motorola G4, IBM
G5, and IBM PowerPC processors starting with the Power6, which we
believe includes almost all PowerPC-based desktop systems since 1999
and servers since 2007.

If your platform does not support one of these vector instruction
sets, the configure script will revert to an unoptimized
implementation called the “dummy” implementation. The dummy
implementation is two orders of magnitude slower. It will enable you
to see H3’s scientific features on a much wider range of processors,
but is not suited for real production work.

We do aim to be portable to all modern processors. The acceleration
algorithms are designed to be portable despite their use of
specialized SIMD vector instructions. We hope to add support for the
Sun SPARC VIS instruction set, for example. We believe that the code
will be able to take advantage of GPGPUs and FPGAs in the future.
"""

So it seems that the failures on non-Intel architectures are not, in
fact, expected. The "dummy" implementation may be buggy.

Presumably you can manually configure it to use the "dummy"
implementation on an Intel processor. Does that work?



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