Bug#930482: openblas: uses AVX-512 even when AVX-512 is not available in a VM

[Ansgar Burchardt]

Package: libopenblas-base
Version: 0.3.5+ds-3
Severity: important
File: /usr/lib/x86_64-linux-gnu/libopenblas.so.0
Tags: upstream

OpenBLAS tries to use AVX-2 / AVX-512 even when it is not actually
available, causing programs to crash with SIGILL:

+---
| Thread 1 "cholmodtest" received signal SIGILL, Illegal instruction.
| 0x00007ffff728fc18 in dgemv_n_SKYLAKEX () from /usr/lib/x86_64-linux-gnu/libopenblas.so.0
| (gdb) bt
| #0  0x00007ffff728fc18 in dgemv_n_SKYLAKEX () from /usr/lib/x86_64-linux-gnu/libopenblas.so.0
| [...]
| (gdb) disassemble 0x00007ffff728fc18,+8
| Dump of assembler code from 0x7ffff728fc18 to 0x7ffff728fc20:
| => 0x00007ffff728fc18 <dgemv_n_SKYLAKEX+2024>:  vmovsd (%rdx),%xmm18
|    0x00007ffff728fc1e <dgemv_n_SKYLAKEX+2030>:  inc    %rax
+---

As far as I found out, the %xmm18 register should only be available with AVX-512.

The CPU model is capable of AVX-2 and AVX-512, however it is not made
available in the VM I am using and therefore missing from the "Flags"
below.

+---
| Architecture:        x86_64
| CPU op-mode(s):      32-bit, 64-bit
| Byte Order:          Little Endian
| Address sizes:       40 bits physical, 48 bits virtual
| CPU(s):              16
| On-line CPU(s) list: 0-15
| Thread(s) per core:  1
| Core(s) per socket:  1
| Socket(s):           16
| NUMA node(s):        2
| Vendor ID:           GenuineIntel
| CPU family:          6
| Model:               85
| Model name:          Intel(R) Xeon(R) Gold 6136 CPU @ 3.00GHz
| Stepping:            4
| CPU MHz:             3000.000
| BogoMIPS:            6000.00
| Hypervisor vendor:   VMware
| Virtualization type: full
| L1d cache:           32K
| L1i cache:           32K
| L2 cache:            1024K
| L3 cache:            25344K
| NUMA node0 CPU(s):   0-7
| NUMA node1 CPU(s):   8-15
| Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts mmx fxsr sse sse2 ss syscall nx pdpe1gb rdtscp lm constant_tsc arch_perfmon pebs bts nopl xtopology tsc_reliable nonstop_tsc cpuid pni pclmulqdq ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand hypervisor lahf_lm 3dnowprefetch cpuid_fault pti ssbd ibrs ibpb stibp fsgsbase smep arat md_clear flush_l1d arch_capabilities
+---[ Output from `lscpu` ]

Ansgar