Bug#1069424: yosys: FTBFS on armhf: make[3]: *** [Makefile:32: 011/submod_dots.pdf] Error 1

Tarik Graba tarik.graba at telecom-paris.fr
Sat Oct 5 11:04:53 BST 2024



Le 04/10/2024 à 21:53, Daniel Gröber a écrit :
> I'm still looking for suggestions for FPGA designs we can use to test the
> whole yosys+nextpnr flow in Debian. See
> https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1068174#30.
> 
> --Daniel

Nextpnr already has a risc-v soc based test design.

https://github.com/YosysHQ/nextpnr/tree/master/ice40/smoketest/attosoc

It is pure Verilog (no SystemVerilog) and should work with the majority 
of opensource tools.

If you are also looking for a dev board, it should be trivial to port te 
design by just changing the pin assignments to one of theses ICE40 boards:

https://alchitry.com/boards/cu/
https://www.latticesemi.com/Products/DevelopmentBoardsAndKits/iCE40HX8KBreakoutBoard.aspx

Which contains the necessary IOs/LED and the usb/spi interface to 
program the FPGA (which has to be purchased separately for the Olimex 
board) using icestorm.

Tarik



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