[Freedombox-discuss] ARM questions

Sandy Harris sandyinchina at gmail.com
Tue Jun 21 16:37:00 UTC 2011

On Tue, Jun 21, 2011 at 4:44 PM, Bdale Garbee <bdale at gag.com> wrote:

>> Also, Debian currently includes a Havege daemon for strong randomness.
>  ...
>> Does it work on the ones we need it for?
> Thanks for the pointer.  I just took a look, and it appears that while
> automatic adjustment for cache sizes is only coded for i386 and amd64,
> that command line arguments to the daemon can be used to identify the
> cache sizes manually.  Since I've not yet tried using it, I can't speak
> to how well that actually works on any particular target.

It is more complex than that. Here's the Havege web page's
overview of where they get entropy:

 Modern superscalar processors feature a large number of
 hardware mechanisms which aim at improving performance:
 caches, branch predictors, TLBs, long pipelines, instruction
 level parallelism, ... The state of these components is not
 architectural (i.e. the result of an ordinary application
 does not depend on it), it is also volatile ...

This sounds both plausible and clever, though I'd like
to see more analysis.

It sounds exceedingly hardware-dependent. The parts
that are " not architectural" are precisely the parts that
a designer is free to alter to make trade-offs, chip
area vs power consumption vs performance. In Intel
parts, for example, i6 and Atom make quite different
trade-offs. They run the same code, but the parts
Havege depends on might be quite different.

It also specifically mentions "superscalar processors"
as the target. Are the ARMs in plugs superscalar?
Has the code to access their state been written?

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