[Pkg-electronics-commits] [SCM] Packaging for gEDA branch, master, updated. 9fac4f9d7ecd2c377d1baad11ba4c68fc675d08e

Thu Nov 19 21:28:51 UTC 2009

The following commit has been merged in the master branch:
commit 544f83ae825f991164f6b79c2abde9890ed961d8
Author: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourceforge.net>
Date:   Thu Nov 19 22:03:22 2009 +0200

    Escape "-"

diff --git a/debian/patches/manpages.diff b/debian/patches/manpages.diff
index e26180e..923a522 100644
--- a/debian/patches/manpages.diff
+++ b/debian/patches/manpages.diff
@@ -1,15 +1,237 @@
-Description: Remove undefined `l' macro
+Description:
+  + Remove undefined `l' macro
+  + Escape "-"
 Author: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourceforge.net>
 --- a/gnetlist/docs/gnetlist.1
 +++ b/gnetlist/docs/gnetlist.1
-@@ -91,7 +91,6 @@
+@@ -3,7 +3,7 @@
+ gnetlist - gEDA/gaf Netlist extraction/generation
+ .SH SYNOPSIS
+ .B gnetlist
+-[-e] [-i] [-I] [-q] [-s] [-v] [-l schem_file] [-m schem_file ] [-n] [ -O option ] [-h | --help] [-g guile_procedure] [-c scheme_string ] [-o output_filename] schematic1 [... schematicN]
++[\-e] [\-i] [\-I] [\-q] [\-s] [\-v] [\-l schem_file] [\-m schem_file ] [\-n] [ \-O option ] [\-h | \-\-help] [\-g guile_procedure] [\-c scheme_string ] [\-o output_filename] schematic1 [... schematicN]
+ .SH DESCRIPTION
+ .PP
+ \fIgnetlist\fP is the netlist extraction/generation program which is part gEDA 
+@@ -19,70 +19,70 @@
+ following backends: 
+ 
+ .IP \[bu] 2 
+-Allegro netlist format (-g allegro)
++Allegro netlist format (\-g allegro)
+ .IP \[bu]
+-BOM / BOM2 - Bill of Materials (-g bom and -g bom2)
++BOM / BOM2 - Bill of Materials (\-g bom and \-g bom2)
+ .IP \[bu]
+-Partslist 1,2,3 - More Bill of Materials (-g partslist[1-3])
++Partslist 1,2,3 - More Bill of Materials (\-g partslist[1-3])
+ .IP \[bu]
+-DRC - Start of a design rule checker (-g drc)
++DRC - Start of a design rule checker (\-g drc)
+ .IP \[bu]
+-DRC2 - A second design rule checker (-g drc2)
++DRC2 - A second design rule checker (\-g drc2)
+ .IP \[bu]
+-gEDA - native format, mainly used for testing (-g geda)
++gEDA - native format, mainly used for testing (\-g geda)
+ .IP \[bu]
+-Gossip netlist format (-g gossip)
++Gossip netlist format (\-g gossip)
+ .IP \[bu]
+-PADS netlist format (-g pads)
++PADS netlist format (\-g pads)
+ .IP \[bu]
+-PCB / PCBboard (-g PCB and -g PCBboard)
++PCB / PCBboard (\-g PCB and \-g PCBboard)
+ .IP \[bu]
+ PCB actions file for forward annotating pin/pad names from
+-schematic to layout (-g pcbpins)
++schematic to layout (\-g pcbpins)
+ .IP \[bu]
+-gsch2pcb backend (-g gsch2pcb)
++gsch2pcb backend (\-g gsch2pcb)
+ .IP \[bu]
+-ProtelII netlist format (-g protelII)
++ProtelII netlist format (\-g protelII)
+ .IP \[bu]
+-Spice compatible netlist format (-g spice)
++Spice compatible netlist format (\-g spice)
+ .IP \[bu]
+-Enhanced spice compatible netlist format (-g spice-sdb)
++Enhanced spice compatible netlist format (\-g spice-sdb)
+ .IP \[bu]
+-Tango netlist format (-g tango)
++Tango netlist format (\-g tango)
+ .IP \[bu]
+-Verilog code (-g verilog)
++Verilog code (\-g verilog)
+ .IP \[bu]
+-VHDL code (-g vhdl)
++VHDL code (\-g vhdl)
+ .IP \[bu]
+-VIPEC netlist format (-g vipec)
++VIPEC netlist format (\-g vipec)
+ .IP \[bu]
+-Bartels Autoengineer netlist format (-g bae)
++Bartels Autoengineer netlist format (\-g bae)
+ .IP \[bu]
+-GOSSIP system simulation system netlist format (-g gossip)
++GOSSIP system simulation system netlist format (\-g gossip)
+ .IP \[bu]
+-MAXASCII netlist format (-g maxascii)
++MAXASCII netlist format (\-g maxascii)
+ .IP \[bu]
+-VHDL-AMS netlist format (-g vams)
++VHDL-AMS netlist format (\-g vams)
+ .IP \[bu]
+-Futurenet2 netlist format (-g futurenet2)
++Futurenet2 netlist format (\-g futurenet2)
+ .IP \[bu]
+-SWITCAP switched capacitor simulator netlist format (-g switcap)
++SWITCAP switched capacitor simulator netlist format (\-g switcap)
+ .IP \[bu]
+-RF Cascade netlist format (-g cascade)
++RF Cascade netlist format (\-g cascade)
+ .IP \[bu]
+-RACAL-REDAC netlist format (-g redac)
++RACAL-REDAC netlist format (\-g redac)
+ .IP \[bu]
+-SystemC netlist backend (-g systemc)
++SystemC netlist backend (\-g systemc)
+ .IP \[bu]
+-Calay format netlist backend (-g calay)
++Calay format netlist backend (\-g calay)
+ .IP \[bu]
+-Osmond format netlist backend (-g osmond)
++Osmond format netlist backend (\-g osmond)
+ .IP \[bu]
+-Eagle netlist format (-g eagle)
++Eagle netlist format (\-g eagle)
+ .IP \[bu]
+-Netlister for symbolic circuit analysis using Mathematica (-g mathematica)
++Netlister for symbolic circuit analysis using Mathematica (\-g mathematica)
+ .IP \[bu]
+-LiquidPCB format netlist backend (-g liquidpcb)
++LiquidPCB format netlist backend (\-g liquidpcb)
+ 
+ For more info on these formats please look at the README.*
+ 
+@@ -91,62 +91,61 @@
  and a few examples on how to run gnetlist.
  
  .SH OPTIONS
 -.l
  \fIgnelist\fP accepts the following options:
  .TP 8
- .B -q
+-.B -q
++.B \-q
+ Quiet mode on.  This mode turns off all warnings/notes/messages. (optional)
+ .TP 8
+-.B -v 
++.B \-v 
+ Verbose mode on.  This mode gives as much feedback to the user as possible. (optional)
+ .TP 8
+-.B -g guile_procedure
++.B \-g guile_procedure
+ Specify the guile procedure which is executed to create the netlist. Use "-g help" to display a list of available backends.
+ .TP 8
+ .B -o output_filename
+ Specify the filename which will contain the netlist generated by gnetlist.  If this option is not specified the default filename is "output.net".
+ .TP 8
+-.B -l scheme_file
++.B \-l scheme_file
+ Specify a filename which contains scheme code to be loaded and
+ execute before any backend is loaded or any guile procedure (using -g flag) 
+ is executed.  This flag can be specified multiple times and can be used to 
+ pass information to backends.
+ .TP 8
+-.B -e, --embed 
++.B \-e, \-\-embed 
+ Force embedding contents of .include file when using the spice-sdb backend.
+ .TP 8
+-.B -O string
++.B \-O string
+ Pass the given option to the specified backend.
+ .TP 8
+-.B -m scheme_file
++.B \-m scheme_file
+ Specify a filename which contains scheme code to be loaded and
+ execute after the backend is loaded but still before any guile procedure 
+ (using -g flag) is executed.  This flag can be specified multiple times 
+ and can be used to pass information to backends.  This flag, for example, 
+ allows the user to override variables inside of the backends (such as paths).
+ .TP 8
+-.B -n, --nomunge
++.B \-n, \-\-nomunge
+ Do not autocorrect the refdes attributes.  Only applies to the spice-sdb backend.
+ .TP 8
+-.B -c string
++.B \-c string
+ Pass the specified string to the guile interpreter.  This allows you to 
+ execute arbitrary guile scripts from the command line.  Be sure to surround
+ the string with either single or double quotes to satisfy your shell.  The
+ string is execute before any init or netlist backend scheme code is
+ loaded or executed.
+ .TP 8
+-.B -I, --include 
++.B \-I, \-\-include 
+ Put .INCLUDE <filename> in output file instead of model file's contents.
+ .TP 8
+-.B -h, --help
++.B \-h, \-\-help
+ Print out short command line help.
+ .TP 8
+-.B -i 
++.B \-i 
+ Interactive mode.  After the schematic is read in and parsed then go into 
+ interactive mode.  Interactive mode allows the user to execute guile 
+ procedures directly. 
+ .TP 8
+-.B -s 
++.B \-s 
+ Sort output netlist (for Gnucap)
+ .TP 8
+ schematic1 [... schematicN]
+@@ -170,16 +169,16 @@
+ Specify a guile procedure name to get gnetlist to output a netlist:
+ 
+ .nf
+-	./gnetlist -g geda stack_1.sch 
++	./gnetlist \-g geda stack_1.sch 
+ .ad b 
+ 
+ The netlist output will be written to a file called "output.net" 
+ in the current working directory.
+ 
+-You can specify the output filename by using the -o flag:
++You can specify the output filename by using the \-o flag:
+ 
+ .nf
+-	./gnetlist -g geda stack_1.sch -o stack.netlist
++	./gnetlist \-g geda stack_1.sch \-o stack.netlist
+ .ad b 
+ 
+ The spice backend is run against the schematic(s) if you specify 
+@@ -188,16 +187,16 @@
+ To interact with the guile interpreter:
+ 
+ .nf
+-	./gnetlist -i stack_1.sch 
++	./gnetlist \-i stack_1.sch 
+ .ad b 
+ 
+ You will get a prompt where you can execute guile procedures.
+ 
+ To get a more verbose feedback as to what gnetlist is doing run 
+-with the -v flag:
++with the \-v flag:
+ 
+ .nf
+-	./gnetlist -v -g geda stack_1.sch 
++	./gnetlist \-v \-g geda stack_1.sch 
+ .ad b 
+ 
+ .SH "ENVIRONMENT"
 --- a/gschem/docs/gschem.1
 +++ b/gschem/docs/gschem.1
 @@ -25,7 +25,6 @@
@@ -22,6 +244,15 @@ Author: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourcef
  .B -q
 --- a/gsymcheck/docs/gsymcheck.1
 +++ b/gsymcheck/docs/gsymcheck.1
+@@ -3,7 +3,7 @@
+ gsymcheck - gEDA/gaf Symbol Checker
+ .SH SYNOPSIS
+ .B gsymcheck
+-[-h] [-v] [-q] symbol1 [... symbolN]
++[\-h] [\-v] [\-q] symbol1 [... symbolN]
+ .SH DESCRIPTION
+ .PP
+ \fIgsymcheck\fP is a symbol checker for gEDA/gaf.  Here is a list of checks that 
 @@ -32,7 +32,6 @@
  Checks to make sure the number of pins is the correct number
  
@@ -30,3 +261,22 @@ Author: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourcef
  \fIgsymcheck\fP accepts the following options:
  .TP 8
  .B -q
+@@ -68,15 +67,15 @@
+ 
+ To get the actuall error messages, run:
+ 
+-	gsymcheck -v symbolfilename.sym
++	gsymcheck \-v symbolfilename.sym
+ 
+ To see all the error messages and warnings, run:
+ 
+-	gsymcheck -vv symbolfilename.sym
++	gsymcheck \-vv symbolfilename.sym
+ 
+ To see all the error messages, warnings, and parse info, run:
+ 
+-	gsymcheck -vvv symbolfilename.sym
++	gsymcheck \-vvv symbolfilename.sym
+ 
+ .SH "ENVIRONMENT"
+ \fIgsymcheck\fP respects the following environment variable:

-- 
Packaging for gEDA

