[Pkg-electronics-commits] [SCM] Packaging for geda-xgsch2pcb branch, master, updated. f102a4a20364f58f1a75cab1c071c78cc1742d81

[أحمد المحمودي (Ahmed El-Mahmoudy)]

The following commit has been merged in the master branch:
commit f102a4a20364f58f1a75cab1c071c78cc1742d81
Author: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourceforge.net>
Date:   Sat Jan 2 18:08:38 2010 +0200

    Added manpage for xgsch2pcb.

diff --git a/debian/changelog b/debian/changelog
index 138c41d..f141e04 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -9,6 +9,7 @@ geda-xgsch2pcb (0.1.3-1~2.gbp11d38d) UNRELEASED; urgency=low
 
   [ أحمد المحمودي (Ahmed El-Mahmoudy) ]
   * Use debhelper 7 & simplify rules file
+  * Use python-support instead of python-central.
   * Remove empty postinst & un-necessary dirs files.
   * debian/control:
     + Add intltool to Build-Depends
@@ -17,8 +18,9 @@ geda-xgsch2pcb (0.1.3-1~2.gbp11d38d) UNRELEASED; urgency=low
     + Added Vcs-* fields.
   * Added debian/watch file.
   * debian/rules: No need to remove .py[co] (seems that it is done by
-    some python helper), hence removed override rule for dh_auto_install.
+    the python helper), hence removed override rule for dh_auto_install.
   * debian/copyright: Updated & converted to machine-readable format.
+  * debian/xgsch2pcb.1: added manpage for xgsch2pcb.
 
  -- أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourceforge.net>  Thu, 31 Dec 2009 11:52:59 +0200
 
diff --git a/debian/geda-xgsch2pcb.manpages b/debian/geda-xgsch2pcb.manpages
new file mode 100644
index 0000000..acb2286
--- /dev/null
+++ b/debian/geda-xgsch2pcb.manpages
@@ -0,0 +1 @@
+debian/xgsch2pcb.1
diff --git a/debian/xgsch2pcb.1 b/debian/xgsch2pcb.1
new file mode 100644
index 0000000..caf5a61
--- /dev/null
+++ b/debian/xgsch2pcb.1
@@ -0,0 +1,65 @@
+.TH xgsch2pcb 1 "02 January 2010" "" ""
+.SH NAME
+xgsch2pcb - gEDA/gaf gschem -> PCB workflow GUI
+.SH SYNOPSIS
+.B xgsch2pcb
+[project]
+.SH DESCRIPTION
+.PP
+When designing a printed circuit board (PCB) it's often desirable to
+create a 'schematic' which shows the components to be used and their
+connectivity in an abstract fashion.  The connectivity information is
+then used to help when designing the actual circuit board.
+
+\fIgsch2pcb\fP is a command-line tool, part of the gEDA suite, which is used
+to generate and update a PCB layout.  It works with schematics created
+by \fIgschem\fP, part of the gEDA suite, and layouts created by \fIpcb\fP, a
+PCB layout system commonly used with gEDA.
+
+\fIxgsch2pcb\fP provides an intuitive, user-friendly graphical interface to
+\fIgsch2pcb\fP.
+
+.PP
+The main window is divided into three main areas:
+.IP \(bu 3
+The toolbar at the top offers the usual options to quit the
+program and to load and save project files.
+.IP \(bu 3
+The left hand 'Schematic' frame shows a list of schematic pages that
+the PCB layout will be based on. The 'Edit schematic' and 'Edit
+attributes' buttons respectively launch \fIgschem\fP and \fIgattrib\fP to
+edit the selected schematic page.
+.IP \(bu 3
+The right hand 'Layout' pane shows the name of the PCB layout file
+associated with the project. The 'Edit layout' button launches
+\fIpcb\fP to edit a file, and will offer to update your PCB layout if
+necessary. The 'Update layout' button forces an update of the PCB
+layout even if one isn't strictly necessary.
+.PP
+In order for the update process to work properly, you should never
+launch \fIpcb\fP to edit your PCB layout except through \fIxgsch2pcb\fP.
+If you are editing the layout without \fIxgsch2pcb\fP running and then
+wish to edit your layout you should close \fIpcb\fP, launch
+\fIxgsch2pcb\fP and then use the 'Edit layout' button to launch \fIpcb\fP
+again.
+.PP
+The update process will carry out the following actions to modify your
+layout, after launching \fIpcb\fP if isn't already running:
+.IP 1. 4
+Remove any elements from the layout that are not in the schematic.
+.IP 2. 4
+Find any elements that are in the schematic but not in the layout,
+and add them to the layout (in the top left corner). N.b. that it's
+probably a good idea to leave this corner of your layout clear
+until the layout is more or less finalised, to avoid new elements
+interfering with elements which have already been placed and
+routed.
+.IP 3. 4
+Clear your rats and load a new rats nest.
+.IP 4. 4
+Update the component pin names to match the pin names on the
+schematic symbol.
+.PP
+Note that the update process won't modify your PCB file on disk, and 
+will take into account any changes you have made since you last 
+saved.

-- 
Packaging for geda-xgsch2pcb