[Pkg-electronics-commits] [SCM] Packaging for covered branch, master, updated. upstream/0.7.7-34-gb7fbaac

[أحمد المحمودي (Ahmed El-Mahmoudy)]

The following commit has been merged in the master branch:
commit e28bcb66a817fa43a0a1426f437300bbbcd27ebb
Author: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourceforge.net>
Date:   Sun Mar 28 06:05:53 2010 +0200

    Added manpage.diff patch to escape a hyphen.

diff --git a/debian/patches/manpage.diff b/debian/patches/manpage.diff
new file mode 100644
index 0000000..4752551
--- /dev/null
+++ b/debian/patches/manpage.diff
@@ -0,0 +1,13 @@
+Description: Escape a hyphen
+Author: أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourceforge.net>
+--- a/doc/covered.1
++++ b/doc/covered.1
+@@ -346,7 +346,7 @@
+ .TP
+ If you are compiling a NC-Verilog simulation, switch to NC-Verilog's irun command to load the covered shared object: '\-loadvpi /usr/local/libexec/covered.ncv.so:covered_register' and enable all access with '\-access +rwc'. You can hardcode the $covered_sim call into your RTL or you can run it dynamically using the CLI, by adding the \-input input.tcl switch to irun.  Where the input.tcl file looks like the following and tb.dut is the coverage instance:
+ .br
+-call -systf {$covered_sim} {"scored.cdd"} tb.dut
++call \-systf {$covered_sim} {"scored.cdd"} tb.dut
+ .br
+ run
+ .TP 
diff --git a/debian/patches/series b/debian/patches/series
index d6cfa75..aef844d 100644
--- a/debian/patches/series
+++ b/debian/patches/series
@@ -1 +1,2 @@
 outdated_config.diff
+manpage.diff

-- 
Packaging for covered