[Pkg-electronics-commits] [verilator] branch master updated (29f91a8 -> 45def01)
أحمد المحمودي (Ahmed El-Mahmoudy)
aelmahmoudy at sabily.org
Sat Aug 24 13:29:49 UTC 2013
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aelmahmoudy-guest pushed a change to branch master
in repository verilator.
from 29f91a8 Release 3.850-1
new 9fc1ff7 Imported Upstream version 3.851
new 45def01 Merge tag 'upstream/3.851'
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
Changes | 15 ++
README.pdf | Bin 112274 -> 112563 bytes
configure | 18 +-
configure.ac | 2 +-
include/verilated.cpp | 18 +-
include/verilated.h | 7 +-
include/verilated_config.h | 2 +-
include/verilated_heavy.h | 4 +
include/verilated_syms.h | 18 +-
include/verilated_vpi.h | 176 +++++++++----
internals.pdf | Bin 195627 -> 195921 bytes
src/V3Active.cpp | 2 +-
src/V3Clock.cpp | 12 +-
src/V3Gate.cpp | 2 +-
src/V3LinkLevel.cpp | 2 +
src/V3Number.cpp | 2 +-
src/V3Options.cpp | 4 +-
src/V3Order.cpp | 26 +-
src/V3OrderGraph.h | 5 +-
src/V3PreProc.cpp | 3 +-
src/V3Simulate.h | 4 +-
src/V3Width.cpp | 3 +
src/config_build.h | 2 +-
src/config_rev.h | 2 +-
src/verilog.y | 35 ++-
test_regress/driver.pl | 27 +-
test_regress/t/t_clk_condflop.pl | 5 +-
test_regress/t/t_clk_powerdn.pl | 5 +-
.../t/{t_attr_parenstar.pl => t_dpi_string.pl} | 1 +
.../t/{t_dpi_name_bad.v => t_dpi_string.v} | 15 +-
.../t/{t_dpi_sys_c.cpp => t_dpi_string_c.cpp} | 15 +-
test_regress/t/{t_EXAMPLE.pl => t_final.pl} | 0
test_regress/t/t_final.v | 27 ++
test_regress/t/{t_EXAMPLE.pl => t_gated_clk_1.pl} | 0
test_regress/t/t_gated_clk_1.v | 55 ++++
.../t/{t_interface1.pl => t_interface_twod.pl} | 0
.../{t_interface1_modport.v => t_interface_twod.v} | 31 ++-
.../t/{t_struct_init.pl => t_mod_recurse.pl} | 3 +-
test_regress/t/t_mod_recurse.v | 110 ++++++++
test_regress/t/t_trace_cat.cpp | 2 +-
test_regress/t/{t_alw_dly.pl => t_vams_wreal.pl} | 0
test_regress/t/{t_var_const.v => t_vams_wreal.v} | 21 +-
test_regress/t/t_vpi_memory.cpp | 278 ++++++++++++++++++++
.../t/{t_mem_packed_assign.pl => t_vpi_memory.pl} | 9 +-
test_regress/t/{t_vpi_unimpl.v => t_vpi_memory.v} | 17 +-
test_regress/t/t_vpi_var.cpp | 10 +-
verilator.pdf | Bin 387862 -> 388154 bytes
47 files changed, 810 insertions(+), 185 deletions(-)
copy test_regress/t/{t_attr_parenstar.pl => t_dpi_string.pl} (91%)
copy test_regress/t/{t_dpi_name_bad.v => t_dpi_string.v} (53%)
copy test_regress/t/{t_dpi_sys_c.cpp => t_dpi_string_c.cpp} (82%)
copy test_regress/t/{t_EXAMPLE.pl => t_final.pl} (100%)
create mode 100644 test_regress/t/t_final.v
copy test_regress/t/{t_EXAMPLE.pl => t_gated_clk_1.pl} (100%)
create mode 100644 test_regress/t/t_gated_clk_1.v
copy test_regress/t/{t_interface1.pl => t_interface_twod.pl} (100%)
copy test_regress/t/{t_interface1_modport.v => t_interface_twod.v} (56%)
copy test_regress/t/{t_struct_init.pl => t_mod_recurse.pl} (86%)
create mode 100644 test_regress/t/t_mod_recurse.v
copy test_regress/t/{t_alw_dly.pl => t_vams_wreal.pl} (100%)
copy test_regress/t/{t_var_const.v => t_vams_wreal.v} (51%)
create mode 100644 test_regress/t/t_vpi_memory.cpp
copy test_regress/t/{t_mem_packed_assign.pl => t_vpi_memory.pl} (56%)
copy test_regress/t/{t_vpi_unimpl.v => t_vpi_memory.v} (68%)
--
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