[Pkg-electronics-commits] [verilator] branch upstream updated (4e4068d -> 29747ce)
أحمد المحمودي (Ahmed El-Mahmoudy)
aelmahmoudy at sabily.org
Tue Dec 23 13:57:29 UTC 2014
This is an automated email from the git hooks/post-receive script.
aelmahmoudy-guest pushed a change to branch upstream
in repository verilator.
from 4e4068d Imported Upstream version 3.866
new 29747ce Imported Upstream version 3.868
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
.gitignore | 1 +
Changes | 25 ++
MANIFEST.SKIP | 1 +
Makefile.in | 39 +-
README | 13 +-
README.html | 14 +-
README.pdf | Bin 112209 -> 110434 bytes
TODO | 17 -
bin/verilator | 100 ++---
bin/verilator_coverage | 291 +++++++++++++
bin/verilator_includer | 6 +-
configure | 18 +-
configure.ac | 2 +-
doxygen.config | 2 -
include/verilated.cpp | 50 +++
include/verilated.h | 4 +
include/verilated.mk.in | 10 +-
include/verilated_config.h | 2 +-
include/verilated_cov.cpp | 451 ++++++++++++++++++++
include/verilated_cov.h | 146 +++++++
include/verilated_cov_key.h | 147 +++++++
include/verilated_heavy.h | 13 +-
include/verilated_vcd_c.cpp | 2 +-
include/verilated_vcd_c.h | 2 +-
include/verilated_vcd_sc.cpp | 2 +-
include/verilated_vcd_sc.h | 2 +-
include/verilatedos.h | 7 +
internals.html | 13 +-
internals.pdf | Bin 197500 -> 195665 bytes
internals.pod | 14 +-
internals.txt | 13 +-
readme.pod | 14 +-
src/Makefile.in | 8 +-
src/Makefile_obj.in | 26 +-
src/V3Assert.cpp | 22 +-
src/V3AssertPre.cpp | 15 -
src/V3Ast.cpp | 25 --
src/V3Ast.h | 26 +-
src/V3AstNodes.cpp | 10 +-
src/V3AstNodes.h | 258 ++++++++----
src/V3Branch.cpp | 45 +-
src/V3Config.h | 1 +
src/V3Const.cpp | 10 +-
src/V3EmitC.cpp | 39 +-
src/V3EmitMk.cpp | 6 +-
src/V3EmitV.cpp | 6 +-
src/V3EmitXml.cpp | 2 +-
src/V3Error.cpp | 284 +------------
src/V3Error.h | 154 +------
src/V3File.cpp | 2 +-
src/{V3Error.cpp => V3FileLine.cpp} | 215 +---------
src/V3FileLine.h | 171 ++++++++
src/V3Global.h | 1 +
src/V3LinkDot.cpp | 17 +
src/V3LinkLevel.cpp | 7 +-
src/V3Number.cpp | 69 +++-
src/V3Number.h | 27 +-
src/V3Number_test.cpp | 1 +
src/V3Options.cpp | 24 +-
src/V3Options.h | 10 +-
src/V3ParseImp.cpp | 2 +-
src/V3ParseImp.h | 4 +-
src/V3ParseLex.cpp | 9 -
src/V3ParseSym.h | 1 +
src/V3PreLex.h | 5 +-
src/V3PreLex.l | 62 +--
src/V3PreProc.cpp | 11 +-
src/V3PreProc.h | 2 +-
src/V3PreShell.h | 1 +
src/V3Premit.cpp | 24 +-
src/V3Stats.cpp | 28 +-
src/V3Stats.h | 3 +-
src/V3Subst.cpp | 11 +-
src/V3Unknown.cpp | 8 +-
src/V3Width.cpp | 457 ++++++++++++++++++---
src/V3WidthCommit.h | 5 +-
src/Verilator.cpp | 2 +-
src/VlcBucket.h | 133 ++++++
src/VlcMain.cpp | 203 +++++++++
src/VlcOptions.h | 87 ++++
src/VlcPoint.h | 152 +++++++
src/VlcSource.h | 145 +++++++
src/VlcTest.h | 137 ++++++
src/VlcTop.cpp | 263 ++++++++++++
src/VlcTop.h | 69 ++++
src/astgen | 8 +-
src/config_build.h | 2 +-
src/config_rev.h | 2 +-
src/verilog.l | 172 ++------
src/verilog.y | 94 +----
src/vlcovgen | 173 ++++++++
test_regress/Makefile_obj | 2 +-
test_regress/driver.pl | 16 +-
test_regress/t/t_assert_basic_cover.pl | 2 +-
test_regress/t/t_assert_cover.pl | 2 +-
test_regress/t/t_bitsel_wire_array_bad.pl | 13 +-
test_regress/t/t_cover_line.out | 170 ++++++++
test_regress/t/t_cover_line_cc.pl | 9 +-
test_regress/t/t_cover_line_sp.pl | 24 --
test_regress/t/t_cover_sva_notflat.pl | 2 +-
test_regress/t/t_cover_toggle.pl | 2 +-
test_regress/t/t_dist_spdiff.pl | 23 --
test_regress/t/{t_EXAMPLE.pl => t_enum_name2.pl} | 0
test_regress/t/t_enum_name2.v | 31 ++
test_regress/t/t_enum_type_methods.v | 143 ++++---
...sv_enum_type_methods.pl => t_enum_type_pins.pl} | 0
...t_sv_enum_type_methods.v => t_enum_type_pins.v} | 0
.../t/{t_flag_topmodule.pl => t_flag_stats.pl} | 8 +-
test_regress/t/{t_func_lib.v => t_flag_stats.v} | 6 +-
test_regress/t/t_flag_werror_bad2.pl | 2 +-
test_regress/t/t_help.pl | 22 +-
test_regress/t/t_inst_overwide.pl | 2 +-
test_regress/t/t_inst_overwide_bad.pl | 2 +-
.../t/{t_interface1.pl => t_interface_gen4.pl} | 0
test_regress/t/t_interface_gen4.v | 58 +++
test_regress/t/t_math_real.v | 1 +
test_regress/t/t_mem_multidim_trace.pl | 2 +-
test_regress/t/t_preproc_psl.v | 72 ----
test_regress/t/t_preproc_psl_off.out | 99 -----
test_regress/t/t_preproc_psl_off.pl | 24 --
test_regress/t/t_preproc_psl_on.out | 88 ----
test_regress/t/t_preproc_psl_on.pl | 24 --
test_regress/t/t_psl_basic.pl | 19 -
test_regress/t/t_psl_basic.v | 54 ---
test_regress/t/t_psl_basic_cover.pl | 26 --
test_regress/t/t_psl_basic_off.pl | 21 -
test_regress/t/t_savable.v | 1 +
test_regress/t/{t_EXAMPLE.pl => t_string.pl} | 0
test_regress/t/t_string.v | 91 ++++
test_regress/t/t_sys_sformat.v | 4 +
test_regress/t/t_trace_ena_sp.pl | 26 --
test_regress/t/t_trace_off_sp.pl | 25 --
...{t_clk_condflop_nord.pl => t_trace_scstruct.pl} | 6 +-
test_regress/t/t_trace_scstruct.v | 26 ++
test_regress/t/t_var_pins_sc1.pl | 34 +-
test_regress/t/t_var_pins_sc2.pl | 34 +-
test_regress/t/t_var_pins_sc32.pl | 34 +-
test_regress/t/t_var_pins_sc64.pl | 34 +-
test_regress/t/t_var_pins_sc_biguint.pl | 42 +-
test_regress/t/t_var_pins_sc_uint.pl | 42 +-
test_regress/t/t_var_pins_sc_uint_biguint.pl | 42 +-
test_regress/t/t_var_pins_scui.pl | 34 +-
test_regress/t/{t_gen_index.pl => t_var_static.pl} | 7 +-
test_regress/t/t_var_static.v | 69 ++++
test_regress/t/t_vlcov_data_a.dat | 5 +
test_regress/t/t_vlcov_data_b.dat | 5 +
test_regress/t/t_vlcov_data_c.dat | 2 +
test_regress/t/t_vlcov_data_d.dat | 2 +
test_regress/t/t_vlcov_merge.out | 8 +
.../t/{t_lint_restore_bad.pl => t_vlcov_merge.pl} | 17 +-
test_regress/t/t_vlcov_rank.out | 6 +
.../t/{t_mem_multi_io2_cc.pl => t_vlcov_rank.pl} | 22 +-
.../t/{t_extend_class.pl => t_vlcov_rewrite.pl} | 22 +-
test_sc/Makefile | 7 +-
test_sc/sc_main.cpp | 37 +-
test_sp/.gitignore | 8 -
test_sp/Makefile | 86 ----
test_sp/Makefile_obj | 37 --
test_vcs/.gitignore | 13 -
test_vcs/Makefile | 76 ----
test_vcs/bench.v | 81 ----
verilator.1 | 98 ++---
verilator.html | 93 ++---
verilator.pdf | Bin 389398 -> 386595 bytes
verilator.txt | 100 ++---
verilator_coverage.1 | 238 +++++++++++
166 files changed, 4881 insertions(+), 2779 deletions(-)
create mode 100755 bin/verilator_coverage
create mode 100644 include/verilated_cov.cpp
create mode 100644 include/verilated_cov.h
create mode 100644 include/verilated_cov_key.h
copy src/{V3Error.cpp => V3FileLine.cpp} (56%)
create mode 100644 src/V3FileLine.h
create mode 100644 src/VlcBucket.h
create mode 100644 src/VlcMain.cpp
create mode 100644 src/VlcOptions.h
create mode 100644 src/VlcPoint.h
create mode 100644 src/VlcSource.h
create mode 100644 src/VlcTest.h
create mode 100644 src/VlcTop.cpp
create mode 100644 src/VlcTop.h
create mode 100755 src/vlcovgen
create mode 100644 test_regress/t/t_cover_line.out
delete mode 100755 test_regress/t/t_cover_line_sp.pl
delete mode 100755 test_regress/t/t_dist_spdiff.pl
copy test_regress/t/{t_EXAMPLE.pl => t_enum_name2.pl} (100%)
create mode 100644 test_regress/t/t_enum_name2.v
rename test_regress/t/{t_sv_enum_type_methods.pl => t_enum_type_pins.pl} (100%)
rename test_regress/t/{t_sv_enum_type_methods.v => t_enum_type_pins.v} (100%)
copy test_regress/t/{t_flag_topmodule.pl => t_flag_stats.pl} (84%)
copy test_regress/t/{t_func_lib.v => t_flag_stats.v} (68%)
copy test_regress/t/{t_interface1.pl => t_interface_gen4.pl} (100%)
create mode 100644 test_regress/t/t_interface_gen4.v
delete mode 100644 test_regress/t/t_preproc_psl.v
delete mode 100644 test_regress/t/t_preproc_psl_off.out
delete mode 100755 test_regress/t/t_preproc_psl_off.pl
delete mode 100644 test_regress/t/t_preproc_psl_on.out
delete mode 100755 test_regress/t/t_preproc_psl_on.pl
delete mode 100755 test_regress/t/t_psl_basic.pl
delete mode 100644 test_regress/t/t_psl_basic.v
delete mode 100755 test_regress/t/t_psl_basic_cover.pl
delete mode 100755 test_regress/t/t_psl_basic_off.pl
copy test_regress/t/{t_EXAMPLE.pl => t_string.pl} (100%)
create mode 100644 test_regress/t/t_string.v
delete mode 100755 test_regress/t/t_trace_ena_sp.pl
delete mode 100755 test_regress/t/t_trace_off_sp.pl
copy test_regress/t/{t_clk_condflop_nord.pl => t_trace_scstruct.pl} (78%)
create mode 100644 test_regress/t/t_trace_scstruct.v
copy test_regress/t/{t_gen_index.pl => t_var_static.pl} (91%)
create mode 100644 test_regress/t/t_var_static.v
create mode 100644 test_regress/t/t_vlcov_data_a.dat
create mode 100644 test_regress/t/t_vlcov_data_b.dat
create mode 100644 test_regress/t/t_vlcov_data_c.dat
create mode 100644 test_regress/t/t_vlcov_data_d.dat
create mode 100644 test_regress/t/t_vlcov_merge.out
copy test_regress/t/{t_lint_restore_bad.pl => t_vlcov_merge.pl} (61%)
create mode 100644 test_regress/t/t_vlcov_rank.out
copy test_regress/t/{t_mem_multi_io2_cc.pl => t_vlcov_rank.pl} (59%)
copy test_regress/t/{t_extend_class.pl => t_vlcov_rewrite.pl} (55%)
delete mode 100644 test_sp/.gitignore
delete mode 100644 test_sp/Makefile
delete mode 100644 test_sp/Makefile_obj
delete mode 100644 test_vcs/.gitignore
delete mode 100644 test_vcs/Makefile
delete mode 100644 test_vcs/bench.v
create mode 100644 verilator_coverage.1
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