[Pkg-electronics-commits] [verilator] branch upstream updated (8ab6ca0 -> 4aad86f)
أحمد المحمودي (Ahmed El-Mahmoudy)
aelmahmoudy at sabily.org
Sun Sep 28 11:57:58 UTC 2014
This is an automated email from the git hooks/post-receive script.
aelmahmoudy-guest pushed a change to branch upstream
in repository verilator.
from 8ab6ca0 Imported Upstream version 3.862
new 4aad86f Imported Upstream version 3.864
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
Changes | 25 +
README.pdf | Bin 112696 -> 112602 bytes
bin/verilator | 10 +-
bin/verilator_profcfunc | 16 +-
configure | 86 ++-
configure.ac | 6 +-
include/verilated.cpp | 3 +
include/verilated.mk.in | 5 +-
include/verilated_config.h | 2 +-
include/verilated_vcd_c.cpp | 2 +-
include/verilated_vpi.h | 22 +-
internals.pdf | Bin 197981 -> 197894 bytes
src/V3Assert.cpp | 9 +-
src/V3Ast.h | 70 ++-
src/V3AstNodes.cpp | 18 +
src/V3AstNodes.h | 656 +++++++++++++--------
src/V3EmitC.cpp | 6 +-
src/V3EmitV.cpp | 3 +-
src/V3Expand.cpp | 6 +-
src/V3File.cpp | 2 +-
src/V3GraphDfa.h | 1 +
src/V3Inline.cpp | 4 +
src/V3Number.h | 2 +-
src/V3Param.cpp | 3 +-
src/V3Premit.cpp | 67 ++-
src/V3Scope.cpp | 4 +
src/V3Split.cpp | 1 -
src/V3TraceDecl.cpp | 1 -
src/V3Width.cpp | 15 +-
src/config_build.h | 2 +-
src/config_rev.h | 2 +-
src/verilog.y | 33 +-
test_regress/driver.pl | 2 +-
test_regress/t/t_EXAMPLE.v | 4 +-
test_regress/t/t_assert_basic.v | 2 +-
test_regress/t/t_case_huge.pl | 10 +-
test_regress/t/t_case_huge_prof.pl | 44 ++
test_regress/t/t_dpi_context.v | 14 +
test_regress/t/t_dpi_context_c.cpp | 7 +
test_regress/t/t_flag_ldflags.pl | 6 +-
test_regress/t/t_math_real.v | 2 +
test_regress/t/t_math_trig.v | 2 +
test_regress/t/t_param.v | 4 +-
.../t/{t_interface_param1.pl => t_struct_anon.pl} | 0
test_regress/t/t_struct_anon.v | 26 +
.../t/{t_func_v_noinl.pl => t_struct_unaligned.pl} | 4 +-
test_regress/t/t_struct_unaligned.v | 35 ++
.../t/{t_order_multidriven.pl => t_trace_param.pl} | 4 +-
test_regress/t/t_trace_param.v | 36 ++
.../t/{t_EXAMPLE.pl => t_var_assign_landr.pl} | 0
.../t/{t_EXAMPLE.v => t_var_assign_landr.v} | 56 +-
test_regress/t/t_vpi_get.cpp | 2 +-
test_regress/t/t_vpi_memory.cpp | 4 +-
verilator.1 | 12 +-
verilator.html | 10 +-
verilator.pdf | Bin 388262 -> 388497 bytes
verilator.txt | 10 +-
veripool-logo.png | Bin 885 -> 0 bytes
58 files changed, 975 insertions(+), 403 deletions(-)
create mode 100755 test_regress/t/t_case_huge_prof.pl
copy test_regress/t/{t_interface_param1.pl => t_struct_anon.pl} (100%)
create mode 100644 test_regress/t/t_struct_anon.v
copy test_regress/t/{t_func_v_noinl.pl => t_struct_unaligned.pl} (82%)
create mode 100644 test_regress/t/t_struct_unaligned.v
copy test_regress/t/{t_order_multidriven.pl => t_trace_param.pl} (81%)
create mode 100644 test_regress/t/t_trace_param.v
copy test_regress/t/{t_EXAMPLE.pl => t_var_assign_landr.pl} (100%)
copy test_regress/t/{t_EXAMPLE.v => t_var_assign_landr.v} (64%)
delete mode 100644 veripool-logo.png
--
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