[Pkg-electronics-devel] Bug#1047590: iverilog: Fails to build source after successful build

Lucas Nussbaum lucas at debian.org
Sun Aug 13 20:20:48 BST 2023 

Source: iverilog
Version: 12.0-2
Severity: minor
Tags: trixie sid ftbfs
User: lucas at debian.org
Usertags: ftbfs-sab-20230813 ftbfs-source-after-build
User: debian-qa at lists.debian.org
Usertags: qa-doublebuild

Hi,

This package fails to build a source package after a successful build
(dpkg-buildpackage ; dpkg-buildpackage -S).

This is probably a clear violation of Debian Policy section 4.9 (clean target),
but this is filed as severity:minor for now, because a discussion on
debian-devel showed that we might want to revisit the requirement of a working
'clean' target.

More information about this class of issues, included common problems and
solutions, is available at
https://wiki.debian.org/qa.debian.org/FTBFS/SourceAfterBuild

Relevant part of the build log:
> cd /<<PKGBUILDDIR>> && runuser -u user42 -- dpkg-buildpackage --sanitize-env -us -uc -rfakeroot -S
> ----------------------------------------------------------------------------------------------------------------------
> 
> dpkg-buildpackage: info: source package iverilog
> dpkg-buildpackage: info: source version 12.0-2
> dpkg-buildpackage: info: source distribution unstable
> dpkg-buildpackage: info: source changed by أحمد المحمودي (Ahmed El-Mahmoudy) <aelmahmoudy at users.sourceforge.net>
>  dpkg-source --before-build .
>  debian/rules clean
> dh clean
>    dh_auto_clean
> 	make -j8 distclean
> make[1]: Entering directory '/<<PKGBUILDDIR>>'
> make -C ivlpp clean &&  make -C vhdlpp clean &&  make -C vvp clean &&  make -C vpi clean &&  make -C libveriuser clean &&  make -C cadpli clean &&  make -C tgt-null clean &&  make -C tgt-stub clean &&  make -C tgt-vvp clean &&  make -C tgt-vhdl clean &&  make -C tgt-vlog95 clean &&  make -C tgt-pcb clean &&  make -C tgt-blif clean &&  make -C tgt-sizer clean &&  make -C driver clean &&  true
> make[2]: Entering directory '/<<PKGBUILDDIR>>/ivlpp'
> rm -f *.o lexor.c ivlpp
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/ivlpp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/vhdlpp'
> rm -f *.o *~ parse.cc parse.h lexor.cc parse.output lexor_keyword.cc
> rm -rf dep vhdlpp
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/vhdlpp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/vvp'
> rm -f *.o *~ parse.cc parse.h lexor.cc tables.cc
> rm -rf dep vvp parse.output vvp.man vvp.ps vvp.pdf vvp.exp
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/vvp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/vpi'
> rm -rf *.o sys_readmem_lex.c dep libvpi.a system.vpi
> rm -f sdf_lexor.c sdf_parse.c sdf_parse.output sdf_parse.h
> rm -f table_mod_parse.c table_mod_parse.h table_mod_parse.output
> rm -f table_mod_lexor.c
> rm -f va_math.vpi v2005_math.vpi v2009.vpi vhdl_sys.vpi vhdl_textio.vpi vpi_debug.vpi
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/vpi'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/libveriuser'
> rm -rf *.o dep libveriuser.a libveriuser.o
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/libveriuser'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/cadpli'
> rm -rf *.o dep cadpli.vpl
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/cadpli'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-null'
> rm -rf *.o dep null.tgt
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-null'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-stub'
> rm -rf *.o dep stub.tgt
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-stub'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-vvp'
> rm -rf *.o dep vvp.tgt vvp.conf vvp-s.conf
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-vvp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-vhdl'
> rm -rf vhdl.o state.o vhdl_element.o vhdl_type.o vhdl_syntax.o scope.o process.o stmt.o expr.o lpm.o support.o cast.o logic.o dep vhdl.tgt
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-vhdl'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-vlog95'
> rm -rf *.o dep vlog95.tgt
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-vlog95'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-pcb'
> rm -f fp.cc fp.h fp.output fp_lex.cc
> rm -rf *.o dep pcb.tgt
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-pcb'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-blif'
> rm -rf *.o dep blif.tgt
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-blif'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-sizer'
> rm -rf *.o dep sizer.tgt
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-sizer'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/driver'
> rm -f *.o cflexor.c cfparse.c cfparse.h cfparse.output
> rm -f iverilog iverilog.man iverilog.pdf iverilog.ps
> rm -rf dep
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/driver'
> rm -f *.o parse.cc parse.h lexor.cc
> rm -f ivl.exp iverilog-vpi.man iverilog-vpi.pdf iverilog-vpi.ps
> rm -f parse.output syn-rules.output dosify ivl check.vvp
> rm -f lexor_keyword.cc libivl.a libvpi.a iverilog-vpi syn-rules.cc
> rm -rf dep
> rm -f version.exe
> make -C ivlpp distclean &&  make -C vhdlpp distclean &&  make -C vvp distclean &&  make -C vpi distclean &&  make -C libveriuser distclean &&  make -C cadpli distclean &&  make -C tgt-null distclean &&  make -C tgt-stub distclean &&  make -C tgt-vvp distclean &&  make -C tgt-vhdl distclean &&  make -C tgt-vlog95 distclean &&  make -C tgt-pcb distclean &&  make -C tgt-blif distclean &&  make -C tgt-sizer distclean &&  make -C driver distclean &&  true
> make[2]: Entering directory '/<<PKGBUILDDIR>>/ivlpp'
> rm -f *.o lexor.c ivlpp
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/ivlpp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/vhdlpp'
> rm -f *.o *~ parse.cc parse.h lexor.cc parse.output lexor_keyword.cc
> rm -rf dep vhdlpp
> rm -f Makefile config.log
> rm -f stamp-vhdlpp_config-h vhdlpp_config.h
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/vhdlpp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/vvp'
> rm -f *.o *~ parse.cc parse.h lexor.cc tables.cc
> rm -rf dep vvp parse.output vvp.man vvp.ps vvp.pdf vvp.exp
> rm -f Makefile config.log
> rm -f stamp-config-h config.h
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/vvp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/vpi'
> rm -rf *.o sys_readmem_lex.c dep libvpi.a system.vpi
> rm -f sdf_lexor.c sdf_parse.c sdf_parse.output sdf_parse.h
> rm -f table_mod_parse.c table_mod_parse.h table_mod_parse.output
> rm -f table_mod_lexor.c
> rm -f va_math.vpi v2005_math.vpi v2009.vpi vhdl_sys.vpi vhdl_textio.vpi vpi_debug.vpi
> rm -f Makefile config.log
> rm -f vpi_config.h stamp-vpi_config-h
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/vpi'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/libveriuser'
> rm -rf *.o dep libveriuser.a libveriuser.o
> rm -f Makefile config.log
> rm -f config.h stamp-config-h
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/libveriuser'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/cadpli'
> rm -rf *.o dep cadpli.vpl
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/cadpli'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-null'
> rm -rf *.o dep null.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-null'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-stub'
> rm -rf *.o dep stub.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-stub'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-vvp'
> rm -rf *.o dep vvp.tgt vvp.conf vvp-s.conf
> rm -f Makefile config.log
> rm -f stamp-vvp_config-h vvp_config.h
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-vvp'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-vhdl'
> rm -rf vhdl.o state.o vhdl_element.o vhdl_type.o vhdl_syntax.o scope.o process.o stmt.o expr.o lpm.o support.o cast.o logic.o dep vhdl.tgt
> rm -f Makefile config.log
> rm -f stamp-vhdl_config-h vhdl_config.h
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-vhdl'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-vlog95'
> rm -rf *.o dep vlog95.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-vlog95'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-pcb'
> rm -f fp.cc fp.h fp.output fp_lex.cc
> rm -rf *.o dep pcb.tgt
> rm -f Makefile config.log
> rm -f stamp-pcb_config-h pcb_config.h
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-pcb'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-blif'
> rm -rf *.o dep blif.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-blif'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-sizer'
> rm -rf *.o dep sizer.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-sizer'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/driver'
> rm -f *.o cflexor.c cfparse.c cfparse.h cfparse.output
> rm -f iverilog iverilog.man iverilog.pdf iverilog.ps
> rm -rf dep
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/driver'
> make -C tgt-fpga distclean &&  make -C tgt-pal distclean &&  make -C tgt-verilog distclean &&  make -C driver-vpi distclean &&  true
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-fpga'
> rm -rf *.o dep fpga.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-fpga'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-pal'
> rm -rf *.o dep pal.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-pal'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/tgt-verilog'
> rm -rf *.o dep verilog.tgt
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/tgt-verilog'
> make[2]: Entering directory '/<<PKGBUILDDIR>>/driver-vpi'
> rm -f *.o config.h iverilog-vpi res.rc
> rm -f Makefile config.log
> make[2]: Leaving directory '/<<PKGBUILDDIR>>/driver-vpi'
> rm -f Makefile config.status config.log config.cache
> rm -f stamp-config-h config.h
> rm -f stamp-_pli_types-h _pli_types.h
> rm -rf autom4te.cache
> make[1]: Leaving directory '/<<PKGBUILDDIR>>'
>    dh_clean
>  dpkg-source -b .
> dpkg-source: info: using source format '3.0 (quilt)'
> dpkg-source: info: building iverilog using existing ./iverilog_12.0.orig.tar.gz
> dpkg-source: info: using patch list from debian/patches/series
> dpkg-source: warning: executable mode 0755 of 'configure' will not be represented in diff
> dpkg-source: info: local changes detected, the modified files are:
>  iverilog-12.0/configure
>  iverilog-12.0/version_tag.h
> dpkg-source: error: aborting due to unexpected upstream changes, see /tmp/iverilog_12.0-2.diff.YD_ALe
> dpkg-source: info: Hint: make sure the version in debian/changelog matches the unpacked source tree
> dpkg-source: info: you can integrate the local changes with dpkg-source --commit
> dpkg-buildpackage: error: dpkg-source -b . subprocess returned exit status 2
> 
> E: Command 'cd /<<PKGBUILDDIR>> && runuser -u user42 -- dpkg-buildpackage --sanitize-env -us -uc -rfakeroot -S' failed to run.


The full build log is available from:
http://qa-logs.debian.net/2023/08/13/iverilog_12.0-2_unstable.log

If you reassign this bug to another package, please mark it as 'affects'-ing
this package. See https://www.debian.org/Bugs/server-control#affects

If you fail to reproduce this, please provide a build log and diff it with mine
so that we can identify if something relevant changed in the meantime.

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