[Pkg-haskell-commits] darcs: ghc: Add patches missing in darcs repo
Joachim Breitner
mail at joachim-breitner.de
Sat Jun 16 15:22:46 UTC 2012
Sat Jun 16 10:34:30 UTC 2012 Joachim Breitner <mail at joachim-breitner.de>
* Add patches missing in darcs repo
Ignore-this: 5b3af887e2361cfdd4c8225d8e414726
A ./patches/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis
A ./patches/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A
A ./patches/memcpy-ffi.patch
Sat Jun 16 10:34:30 UTC 2012 Joachim Breitner <mail at joachim-breitner.de>
* Add patches missing in darcs repo
Ignore-this: 5b3af887e2361cfdd4c8225d8e414726
diff -rN -u old-ghc//patches/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A new-ghc//patches/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A
--- old-ghc//patches/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A 1970-01-01 00:00:00.000000000 +0000
+++ new-ghc//patches/fix-ARM-s-StgCRun-clobbered-register-list-for-both-A 2012-06-16 15:22:45.961822642 +0000
@@ -0,0 +1,34 @@
+From 957f778cb971d63cbbea0c71c727c94474b1b905 Mon Sep 17 00:00:00 2001
+From: Karel Gardas <karel.gardas at centrum.cz>
+Date: Tue, 14 Feb 2012 08:01:47 +0100
+Subject: [PATCH 1/2] fix ARM's StgCRun clobbered register list for both ARM and Thumb modes
+
+---
+ rts/StgCRun.c | 16 +++++++++++++++-
+ 1 files changed, 15 insertions(+), 1 deletions(-)
+
+--- a/rts/StgCRun.c
++++ b/rts/StgCRun.c
+@@ -672,7 +672,21 @@
+ "ldmfd sp!, {r4-r11, fp, ip, lr}\n\t"
+ : "=r" (r)
+ : "r" (f), "r" (basereg), "i" (RESERVED_C_STACK_BYTES)
+- : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%r11", "%fp", "%ip", "%lr"
++#if !defined(__thumb__)
++ /* In ARM mode, r11/fp is frame-pointer and so we cannot mark
++ it as clobbered. If we do so, GCC complains with error. */
++ : "%r4", "%r5", "%r6", "%r7", "%r8", "%r9", "%r10", "%ip", "%lr"
++#else
++ /* In Thumb mode r7 is frame-pointer and so we cannot mark it
++ as clobbered. On the other hand we mark as clobbered also
++ those regs not used in Thumb mode. Hard to judge if this is
++ needed, but certainly Haskell code is using them for
++ placing GHC's virtual registers there. See
++ includes/stg/MachRegs.h Please note that Haskell code is
++ compiled by GHC/LLVM into ARM code (not Thumb!), at least
++ as of February 2012 */
++ : "%r4", "%r5", "%r6", "%r8", "%r9", "%r10", "%fp", "%ip", "%lr"
++#endif
+ );
+ return r;
+ }
diff -rN -u old-ghc//patches/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis new-ghc//patches/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis
--- old-ghc//patches/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis 1970-01-01 00:00:00.000000000 +0000
+++ new-ghc//patches/fix-ARM-StgCRun-to-not-save-and-restore-r11-fp-regis 2012-06-16 15:22:45.961822642 +0000
@@ -0,0 +1,29 @@
+From 1cbf3bcae87dd102942d85ce71ea17d42d4b5f5a Mon Sep 17 00:00:00 2001
+From: Karel Gardas <karel.gardas at centrum.cz>
+Date: Tue, 14 Feb 2012 08:03:07 +0100
+Subject: [PATCH 2/2] fix ARM StgCRun to not save and restore r11/fp register twice
+
+---
+ rts/StgCRun.c | 4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/rts/StgCRun.c
++++ b/rts/StgCRun.c
+@@ -632,7 +632,7 @@
+ /*
+ * save callee-saves registers on behalf of the STG code.
+ */
+- "stmfd sp!, {r4-r11, fp, ip, lr}\n\t"
++ "stmfd sp!, {r4-r10, fp, ip, lr}\n\t"
+ #if !defined(arm_HOST_ARCH_PRE_ARMv6)
+ "vstmdb sp!, {d8-d11}\n\t"
+ #endif
+@@ -669,7 +669,7 @@
+ #if !defined(arm_HOST_ARCH_PRE_ARMv6)
+ "vldmia sp!, {d8-d11}\n\t"
+ #endif
+- "ldmfd sp!, {r4-r11, fp, ip, lr}\n\t"
++ "ldmfd sp!, {r4-r10, fp, ip, lr}\n\t"
+ : "=r" (r)
+ : "r" (f), "r" (basereg), "i" (RESERVED_C_STACK_BYTES)
+ #if !defined(__thumb__)
diff -rN -u old-ghc//patches/memcpy-ffi.patch new-ghc//patches/memcpy-ffi.patch
--- old-ghc//patches/memcpy-ffi.patch 1970-01-01 00:00:00.000000000 +0000
+++ new-ghc//patches/memcpy-ffi.patch 2012-06-16 15:22:45.964829329 +0000
@@ -0,0 +1,84 @@
+commit 40c1106c338e209f07023d165f32bff0f75e2e54
+Author: Paolo Capriotti <p.capriotti at gmail.com>
+Date: Wed May 2 15:24:46 2012 +0100
+Description:
+ Cast memory primops in the C backend (#5976)
+
+ To prevent conflicts with GCC builtins, generate identical code for
+ calls to mem primos and FFI calls.
+
+ Based on a patch by Joachim Breitner.
+Bug: http://hackage.haskell.org/trac/ghc/ticket/5967
+Origin: http://hackage.haskell.org/trac/ghc/changeset/40c1106c338e209f07023d165f32bff0f75e2e54
+
+Index: ghc-7.4.1/compiler/cmm/PprC.hs
+===================================================================
+--- ghc-7.4.1.orig/compiler/cmm/PprC.hs 2012-02-01 19:10:32.000000000 +0100
++++ ghc-7.4.1/compiler/cmm/PprC.hs 2012-05-06 21:41:11.000000000 +0200
+@@ -203,9 +203,6 @@
+ pprCFunType (pprCLabel platform lbl) cconv results args <>
+ noreturn_attr <> semi
+
+- fun_proto lbl = ptext (sLit ";EF_(") <>
+- pprCLabel platform lbl <> char ')' <> semi
+-
+ noreturn_attr = case ret of
+ CmmNeverReturns -> text "__attribute__ ((noreturn))"
+ CmmMayReturn -> empty
+@@ -226,31 +223,43 @@
+ let myCall = pprCall platform (pprCLabel platform lbl) cconv results args
+ in (real_fun_proto lbl, myCall)
+ | not (isMathFun lbl) ->
+- let myCall = braces (
+- pprCFunType (char '*' <> text "ghcFunPtr") cconv results args <> semi
+- $$ text "ghcFunPtr" <+> equals <+> cast_fn <> semi
+- $$ pprCall platform (text "ghcFunPtr") cconv results args <> semi
+- )
+- in (fun_proto lbl, myCall)
++ pprForeignCall platform (pprCLabel platform lbl) cconv results args
+ _ ->
+ (empty {- no proto -},
+ pprCall platform cast_fn cconv results args <> semi)
+ -- for a dynamic call, no declaration is necessary.
+
+ CmmCall (CmmPrim op) results args _ret ->
+- pprCall platform ppr_fn CCallConv results args'
+- where
+- ppr_fn = pprCallishMachOp_for_C op
+- -- The mem primops carry an extra alignment arg, must drop it.
+- -- We could maybe emit an alignment directive using this info.
+- args' | op == MO_Memcpy || op == MO_Memset || op == MO_Memmove = init args
+- | otherwise = args
++ proto $$ fn_call
++ where
++ cconv = CCallConv
++ fn = pprCallishMachOp_for_C op
++ (proto, fn_call)
++ -- The mem primops carry an extra alignment arg, must drop it.
++ -- We could maybe emit an alignment directive using this info.
++ -- We also need to cast mem primops to prevent conflicts with GCC
++ -- builtins (see bug #5967).
++ | op `elem` [MO_Memcpy, MO_Memset, MO_Memmove]
++ = pprForeignCall platform fn cconv results (init args)
++ | otherwise
++ = (empty, pprCall platform fn cconv results args)
+
+ CmmBranch ident -> pprBranch ident
+ CmmCondBranch expr ident -> pprCondBranch platform expr ident
+ CmmJump lbl _params -> mkJMP_(pprExpr platform lbl) <> semi
+ CmmSwitch arg ids -> pprSwitch platform arg ids
+
++pprForeignCall :: Platform -> SDoc -> CCallConv -> [HintedCmmFormal] -> [HintedCmmActual] -> (SDoc, SDoc)
++pprForeignCall platform fn cconv results args = (proto, fn_call)
++ where
++ fn_call = braces (
++ pprCFunType (char '*' <> text "ghcFunPtr") cconv results args <> semi
++ $$ text "ghcFunPtr" <+> equals <+> cast_fn <> semi
++ $$ pprCall platform (text "ghcFunPtr") cconv results args <> semi
++ )
++ cast_fn = parens (parens (pprCFunType (char '*') cconv results args) <> fn)
++ proto = ptext (sLit ";EF_(") <> fn <> char ')' <> semi
++
+ pprCFunType :: SDoc -> CCallConv -> [HintedCmmFormal] -> [HintedCmmActual] -> SDoc
+ pprCFunType ppr_fn cconv ress args
+ = res_type ress <+>
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