[Pkg-haskell-commits] darcs: ghc: * Merge 7.6.3-9 to 7.6.3-12 from unstable

Joachim Breitner mail at joachim-breitner.de
Tue Jun 10 11:10:01 UTC 2014


Tue Jun 10 08:52:58 UTC 2014  Joachim Breitner <mail at joachim-breitner.de>
  * * Merge 7.6.3-9 to 7.6.3-12 from unstable 

    M ./changelog +35
    M ./control +1
    A ./patches/arm64.patch
    A ./patches/ppc64el.patch
    M ./patches/series +2
    M ./provided_substvars -9 +23
    M ./rules -1 +10

Tue Jun 10 08:52:58 UTC 2014  Joachim Breitner <mail at joachim-breitner.de>
  * * Merge 7.6.3-9 to 7.6.3-12 from unstable 
diff -rN -u old-ghc/changelog new-ghc/changelog
--- old-ghc/changelog	2014-06-10 11:10:00.871625202 +0000
+++ new-ghc/changelog	2014-06-10 11:10:00.895625187 +0000
@@ -1,3 +1,9 @@
+ghc (7.8.20140411-4) UNRELEASED; urgency=medium
+
+  * Merge 7.6.3-9 to 7.6.3-12 from unstable 
+
+ -- Joachim Breitner <nomeata at debian.org>  Tue, 10 Jun 2014 10:48:11 +0200
+
 ghc (7.8.20140411-3) experimental; urgency=medium
 
   * Do not pass -optc-mminimal-toc on ppc64 (Closes: #747089), thanks to
@@ -58,6 +64,35 @@
 
  -- Joachim Breitner <nomeata at debian.org>  Wed, 05 Feb 2014 10:51:51 +0000
 
+ghc (7.6.3-12) unstable; urgency=medium
+
+  * Last update broke the calculation of the Provides fields, fixing.
+    (Closes: #751051)
+
+ -- Joachim Breitner <nomeata at debian.org>  Mon, 09 Jun 2014 22:19:03 +0200
+
+ghc (7.6.3-11) unstable; urgency=medium
+
+  * Do no conflict with libghc-cabal-dev. 
+
+ -- Joachim Breitner <nomeata at debian.org>  Sun, 08 Jun 2014 13:56:51 +0200
+
+ghc (7.6.3-10) unstable; urgency=medium
+
+  * Team upload.
+  * Add ppc64el support.
+
+ -- Colin Watson <cjwatson at debian.org>  Sat, 12 Apr 2014 02:26:04 +0100
+
+ghc (7.6.3-9) unstable; urgency=medium
+
+  * Team upload.
+  * Ensure that all copies of config.guess and config.sub in the tree are up
+    to date at build time.
+  * Add arm64 support.
+
+ -- Colin Watson <cjwatson at debian.org>  Sat, 05 Apr 2014 02:00:21 +0100
+
 ghc (7.6.3-8) unstable; urgency=medium
 
   * Apply a4b1a435 from upstream, to fix building on 64 big endian platforms
diff -rN -u old-ghc/control new-ghc/control
--- old-ghc/control	2014-06-10 11:10:00.871625202 +0000
+++ new-ghc/control	2014-06-10 11:10:00.879625198 +0000
@@ -12,6 +12,7 @@
   ghc,
   grep-dctrl,
   dh-autoreconf,
+  autotools-dev,
   llvm [armel armhf],
   libffi-dev,
   pkg-config,
diff -rN -u old-ghc/patches/arm64.patch new-ghc/patches/arm64.patch
--- old-ghc/patches/arm64.patch	1970-01-01 00:00:00.000000000 +0000
+++ new-ghc/patches/arm64.patch	2014-06-10 11:10:00.887625192 +0000
@@ -0,0 +1,322 @@
+commit c29bf984dd20431cd4344e8a5c444d7a5be08389
+Author: Colin Watson <cjwatson at debian.org>
+Date:   Mon Apr 21 22:26:56 2014 -0500
+Bug: https://ghc.haskell.org/trac/ghc/ticket/7942
+
+    ghc: initial AArch64 patches
+    
+    Signed-off-by: Austin Seipp <austin at well-typed.com>
+
+diff --git a/aclocal.m4 b/aclocal.m4
+index 7cae3b5..0c9a697 100644
+--- a/aclocal.m4
++++ b/aclocal.m4
+@@ -197,6 +197,9 @@ AC_DEFUN([FPTOOLS_SET_HASKELL_PLATFORM_VARS],
+             GET_ARM_ISA()
+             test -z "[$]2" || eval "[$]2=\"ArchARM {armISA = \$ARM_ISA, armISAExt = \$ARM_ISA_EXT, armABI = \$ARM_ABI}\""
+             ;;
++        aarch64)
++            test -z "[$]2" || eval "[$]2=ArchARM64"
++            ;;
+         alpha)
+             test -z "[$]2" || eval "[$]2=ArchAlpha"
+             ;;
+@@ -1854,6 +1857,9 @@ AC_MSG_CHECKING(for path to top of build tree)
+ # converts cpu from gnu to ghc naming, and assigns the result to $target_var
+ AC_DEFUN([GHC_CONVERT_CPU],[
+ case "$1" in
++  aarch64*)
++    $2="aarch64"
++    ;;
+   alpha*)
+     $2="alpha"
+     ;;
+diff --git a/compiler/nativeGen/AsmCodeGen.lhs b/compiler/nativeGen/AsmCodeGen.lhs
+index caae4b1..09a3bf7 100644
+--- a/compiler/nativeGen/AsmCodeGen.lhs
++++ b/compiler/nativeGen/AsmCodeGen.lhs
+@@ -166,6 +166,7 @@ nativeCodeGen dflags this_mod h us cmms
+       ArchPPC     -> nCG' (ppcNcgImpl    dflags)
+       ArchSPARC   -> nCG' (sparcNcgImpl  dflags)
+       ArchARM {}  -> panic "nativeCodeGen: No NCG for ARM"
++      ArchARM64   -> panic "nativeCodeGen: No NCG for ARM64"
+       ArchPPC_64  -> panic "nativeCodeGen: No NCG for PPC 64"
+       ArchAlpha   -> panic "nativeCodeGen: No NCG for Alpha"
+       ArchMipseb  -> panic "nativeCodeGen: No NCG for mipseb"
+diff --git a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
+index b5006ec..2d58ed9 100644
+--- a/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
++++ b/compiler/nativeGen/RegAlloc/Graph/TrivColorable.hs
+@@ -113,6 +113,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcInteger conflicts excl
+                             ArchSPARC     -> 14
+                             ArchPPC_64    -> panic "trivColorable ArchPPC_64"
+                             ArchARM _ _ _ -> panic "trivColorable ArchARM"
++                            ArchARM64     -> panic "trivColorable ArchARM64"
+                             ArchAlpha     -> panic "trivColorable ArchAlpha"
+                             ArchMipseb    -> panic "trivColorable ArchMipseb"
+                             ArchMipsel    -> panic "trivColorable ArchMipsel"
+@@ -137,6 +138,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcFloat conflicts exclus
+                             ArchSPARC     -> 22
+                             ArchPPC_64    -> panic "trivColorable ArchPPC_64"
+                             ArchARM _ _ _ -> panic "trivColorable ArchARM"
++                            ArchARM64     -> panic "trivColorable ArchARM64"
+                             ArchAlpha     -> panic "trivColorable ArchAlpha"
+                             ArchMipseb    -> panic "trivColorable ArchMipseb"
+                             ArchMipsel    -> panic "trivColorable ArchMipsel"
+@@ -161,6 +163,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDouble conflicts exclu
+                             ArchSPARC     -> 11
+                             ArchPPC_64    -> panic "trivColorable ArchPPC_64"
+                             ArchARM _ _ _ -> panic "trivColorable ArchARM"
++                            ArchARM64     -> panic "trivColorable ArchARM64"
+                             ArchAlpha     -> panic "trivColorable ArchAlpha"
+                             ArchMipseb    -> panic "trivColorable ArchMipseb"
+                             ArchMipsel    -> panic "trivColorable ArchMipsel"
+@@ -185,6 +188,7 @@ trivColorable platform virtualRegSqueeze realRegSqueeze RcDoubleSSE conflicts ex
+                             ArchSPARC     -> 0
+                             ArchPPC_64    -> panic "trivColorable ArchPPC_64"
+                             ArchARM _ _ _ -> panic "trivColorable ArchARM"
++                            ArchARM64     -> panic "trivColorable ArchARM64"
+                             ArchAlpha     -> panic "trivColorable ArchAlpha"
+                             ArchMipseb    -> panic "trivColorable ArchMipseb"
+                             ArchMipsel    -> panic "trivColorable ArchMipsel"
+diff --git a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
+index 557d713..0247c9d 100644
+--- a/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
++++ b/compiler/nativeGen/RegAlloc/Linear/FreeRegs.hs
+@@ -74,6 +74,7 @@ maxSpillSlots dflags
+                 ArchPPC       -> PPC.Instr.maxSpillSlots dflags
+                 ArchSPARC     -> SPARC.Instr.maxSpillSlots dflags
+                 ArchARM _ _ _ -> panic "maxSpillSlots ArchARM"
++                ArchARM64     -> panic "maxSpillSlots ArchARM64"
+                 ArchPPC_64    -> panic "maxSpillSlots ArchPPC_64"
+                 ArchAlpha     -> panic "maxSpillSlots ArchAlpha"
+                 ArchMipseb    -> panic "maxSpillSlots ArchMipseb"
+diff --git a/compiler/nativeGen/RegAlloc/Linear/Main.hs b/compiler/nativeGen/RegAlloc/Linear/Main.hs
+index 6ac19da..46d5309 100644
+--- a/compiler/nativeGen/RegAlloc/Linear/Main.hs
++++ b/compiler/nativeGen/RegAlloc/Linear/Main.hs
+@@ -207,6 +207,7 @@ linearRegAlloc dflags first_id block_live sccs
+       ArchSPARC     -> linearRegAlloc' dflags (frInitFreeRegs platform :: SPARC.FreeRegs)  first_id block_live sccs
+       ArchPPC       -> linearRegAlloc' dflags (frInitFreeRegs platform :: PPC.FreeRegs)    first_id block_live sccs
+       ArchARM _ _ _ -> panic "linearRegAlloc ArchARM"
++      ArchARM64     -> panic "linearRegAlloc ArchARM64"
+       ArchPPC_64    -> panic "linearRegAlloc ArchPPC_64"
+       ArchAlpha     -> panic "linearRegAlloc ArchAlpha"
+       ArchMipseb    -> panic "linearRegAlloc ArchMipseb"
+diff --git a/compiler/nativeGen/TargetReg.hs b/compiler/nativeGen/TargetReg.hs
+index 09c774f..1f7f4e0 100644
+--- a/compiler/nativeGen/TargetReg.hs
++++ b/compiler/nativeGen/TargetReg.hs
+@@ -54,6 +54,7 @@ targetVirtualRegSqueeze platform
+       ArchSPARC     -> SPARC.virtualRegSqueeze
+       ArchPPC_64    -> panic "targetVirtualRegSqueeze ArchPPC_64"
+       ArchARM _ _ _ -> panic "targetVirtualRegSqueeze ArchARM"
++      ArchARM64     -> panic "targetVirtualRegSqueeze ArchARM64"
+       ArchAlpha     -> panic "targetVirtualRegSqueeze ArchAlpha"
+       ArchMipseb    -> panic "targetVirtualRegSqueeze ArchMipseb"
+       ArchMipsel    -> panic "targetVirtualRegSqueeze ArchMipsel"
+@@ -70,6 +71,7 @@ targetRealRegSqueeze platform
+       ArchSPARC     -> SPARC.realRegSqueeze
+       ArchPPC_64    -> panic "targetRealRegSqueeze ArchPPC_64"
+       ArchARM _ _ _ -> panic "targetRealRegSqueeze ArchARM"
++      ArchARM64     -> panic "targetRealRegSqueeze ArchARM64"
+       ArchAlpha     -> panic "targetRealRegSqueeze ArchAlpha"
+       ArchMipseb    -> panic "targetRealRegSqueeze ArchMipseb"
+       ArchMipsel    -> panic "targetRealRegSqueeze ArchMipsel"
+@@ -85,6 +87,7 @@ targetClassOfRealReg platform
+       ArchSPARC     -> SPARC.classOfRealReg
+       ArchPPC_64    -> panic "targetClassOfRealReg ArchPPC_64"
+       ArchARM _ _ _ -> panic "targetClassOfRealReg ArchARM"
++      ArchARM64     -> panic "targetClassOfRealReg ArchARM64"
+       ArchAlpha     -> panic "targetClassOfRealReg ArchAlpha"
+       ArchMipseb    -> panic "targetClassOfRealReg ArchMipseb"
+       ArchMipsel    -> panic "targetClassOfRealReg ArchMipsel"
+@@ -100,6 +103,7 @@ targetMkVirtualReg platform
+       ArchSPARC     -> SPARC.mkVirtualReg
+       ArchPPC_64    -> panic "targetMkVirtualReg ArchPPC_64"
+       ArchARM _ _ _ -> panic "targetMkVirtualReg ArchARM"
++      ArchARM64     -> panic "targetMkVirtualReg ArchARM64"
+       ArchAlpha     -> panic "targetMkVirtualReg ArchAlpha"
+       ArchMipseb    -> panic "targetMkVirtualReg ArchMipseb"
+       ArchMipsel    -> panic "targetMkVirtualReg ArchMipsel"
+@@ -115,6 +119,7 @@ targetRegDotColor platform
+       ArchSPARC     -> SPARC.regDotColor
+       ArchPPC_64    -> panic "targetRegDotColor ArchPPC_64"
+       ArchARM _ _ _ -> panic "targetRegDotColor ArchARM"
++      ArchARM64     -> panic "targetRegDotColor ArchARM64"
+       ArchAlpha     -> panic "targetRegDotColor ArchAlpha"
+       ArchMipseb    -> panic "targetRegDotColor ArchMipseb"
+       ArchMipsel    -> panic "targetRegDotColor ArchMipsel"
+diff --git a/compiler/utils/Platform.hs b/compiler/utils/Platform.hs
+index ea1a3e5..ca8f0de 100644
+--- a/compiler/utils/Platform.hs
++++ b/compiler/utils/Platform.hs
+@@ -52,6 +52,7 @@ data Arch
+           , armISAExt :: [ArmISAExt]
+           , armABI    :: ArmABI
+           }
++        | ArchARM64
+         | ArchAlpha
+         | ArchMipseb
+         | ArchMipsel
+diff --git a/includes/stg/HaskellMachRegs.h b/includes/stg/HaskellMachRegs.h
+index 94b1612..5480c72 100644
+--- a/includes/stg/HaskellMachRegs.h
++++ b/includes/stg/HaskellMachRegs.h
+@@ -38,6 +38,7 @@
+ #define MACHREGS_powerpc  (powerpc_TARGET_ARCH || powerpc64_TARGET_ARCH || rs6000_TARGET_ARCH)
+ #define MACHREGS_sparc    sparc_TARGET_ARCH
+ #define MACHREGS_arm      arm_TARGET_ARCH
++#define MACHREGS_aarch64  aarch64_TARGET_ARCH
+ #define MACHREGS_darwin   darwin_TARGET_OS
+ 
+ #endif
+diff --git a/includes/stg/MachRegs.h b/includes/stg/MachRegs.h
+index 587f947..417fb69 100644
+--- a/includes/stg/MachRegs.h
++++ b/includes/stg/MachRegs.h
+@@ -1,6 +1,6 @@
+ /* -----------------------------------------------------------------------------
+  *
+- * (c) The GHC Team, 1998-2011
++ * (c) The GHC Team, 1998-2014
+  *
+  * Registers used in STG code.  Might or might not correspond to
+  * actual machine registers.
+@@ -531,6 +531,61 @@
+ #define REG_D2    d11
+ #endif
+ 
++/* -----------------------------------------------------------------------------
++   The ARMv8/AArch64 ABI register mapping
++
++   The AArch64 provides 31 64-bit general purpose registers
++   and 32 128-bit SIMD/floating point registers.
++
++   General purpose registers (see Chapter 5.1.1 in ARM IHI 0055B)
++
++   Register | Special | Role in the procedure call standard
++   ---------+---------+------------------------------------
++     SP     |         | The Stack Pointer
++     r30    |  LR     | The Link Register
++     r29    |  FP     | The Frame Pointer
++   r19-r28  |         | Callee-saved registers
++     r18    |         | The Platform Register, if needed; 
++            |         | or temporary register
++     r17    |  IP1    | The second intra-procedure-call temporary register
++     r16    |  IP0    | The first intra-procedure-call scratch register
++    r9-r15  |         | Temporary registers
++     r8     |         | Indirect result location register
++    r0-r7   |         | Parameter/result registers
++
++
++   FPU/SIMD registers
++
++   s/d/q/v0-v7    Argument / result/ scratch registers
++   s/d/q/v8-v15   callee-saved registers (must be preserved across subrutine calls,
++                  but only bottom 64-bit value needs to be preserved)
++   s/d/q/v16-v31  temporary registers
++
++   ----------------------------------------------------------------------------- */
++
++#elif MACHREGS_aarch64
++
++#define REG(x) __asm__(#x)
++
++#define REG_Base        r19
++#define REG_Sp          r20
++#define REG_Hp          r21
++#define REG_R1          r22
++#define REG_R2          r23
++#define REG_R3          r24
++#define REG_R4          r25
++#define REG_R5          r26
++#define REG_R6          r27
++#define REG_SpLim       r28
++
++#define REG_F1          s8
++#define REG_F2          s9
++#define REG_F3          s10
++#define REG_F4          s11
++
++#define REG_D1          d12
++#define REG_D2          d13
++
+ #else
+ 
+ #error Cannot find platform to give register info for
+diff --git a/rts/StgCRun.c b/rts/StgCRun.c
+index 940e16d..f649dbe 100644
+--- a/rts/StgCRun.c
++++ b/rts/StgCRun.c
+@@ -748,4 +748,70 @@ StgRun(StgFunPtr f, StgRegTable *basereg) {
+ }
+ #endif
+ 
++#ifdef aarch64_HOST_ARCH
++
++StgRegTable *
++StgRun(StgFunPtr f, StgRegTable *basereg) {
++    StgRegTable * r;
++    __asm__ volatile (
++        /*
++         * save callee-saves registers on behalf of the STG code.
++         */
++        "stp x19, x20, [sp, #-16]!\n\t"
++        "stp x21, x22, [sp, #-16]!\n\t"
++        "stp x23, x24, [sp, #-16]!\n\t"
++        "stp x25, x26, [sp, #-16]!\n\t"
++        "stp x27, x28, [sp, #-16]!\n\t" 
++        "stp ip0, ip1, [sp, #-16]!\n\t"
++        "str lr, [sp, #-8]!\n\t"
++
++        /*
++         * allocate some space for Stg machine's temporary storage.
++         * Note: RESERVER_C_STACK_BYTES has to be a round number here or
++         * the assembler can't assemble it.
++         */
++        "str lr, [sp, %3]"
++        /* "sub sp, sp, %3\n\t" */
++        /*
++         * Set BaseReg
++         */
++        "mov x19, %2\n\t"
++        /*
++         * Jump to function argument.
++         */
++        "bx %1\n\t"
++
++        ".globl " STG_RETURN "\n\t"
++        ".type " STG_RETURN ", %%function\n"
++        STG_RETURN ":\n\t"
++        /*
++         * Free the space we allocated
++         */
++        "ldr lr, [sp], %3\n\t"
++        /* "add sp, sp, %3\n\t" */
++        /*
++         * Return the new register table, taking it from Stg's R1 (ARM64's R22).
++         */
++        "mov %0, x22\n\t"
++        /*
++         * restore callee-saves registers.
++         */
++        "ldr lr, [sp], #8\n\t"
++        "ldp ip0, ip1, [sp], #16\n\t"
++        "ldp x27, x28, [sp], #16\n\t"
++        "ldp x25, x26, [sp], #16\n\t"
++        "ldp x23, x24, [sp], #16\n\t"
++        "ldp x21, x22, [sp], #16\n\t"
++        "ldp x19, x20, [sp], #16\n\t"
++
++      : "=r" (r)
++      : "r" (f), "r" (basereg), "i" (RESERVED_C_STACK_BYTES)
++        : "%x19", "%x20", "%x21", "%x22", "%x23", "%x24", "%x25", "%x26", "%x27", "%x28",
++          "%ip0", "%ip1", "%lr"
++    );
++    return r;
++}
++
++#endif
++
+ #endif /* !USE_MINIINTERPRETER */
diff -rN -u old-ghc/patches/ppc64el.patch new-ghc/patches/ppc64el.patch
--- old-ghc/patches/ppc64el.patch	1970-01-01 00:00:00.000000000 +0000
+++ new-ghc/patches/ppc64el.patch	2014-06-10 11:10:00.887625192 +0000
@@ -0,0 +1,41 @@
+Description: Add ppc64el support
+Author: Colin Watson <cjwatson at ubuntu.com>
+Bug: https://ghc.haskell.org/trac/ghc/ticket/8965
+Last-Update: 2014-04-12
+
+Index: ghc-7.8.2/aclocal.m4
+===================================================================
+--- ghc-7.8.2.orig/aclocal.m4	2014-06-10 10:51:13.973444977 +0200
++++ ghc-7.8.2/aclocal.m4	2014-06-10 10:51:23.113444589 +0200
+@@ -209,7 +209,7 @@
+         mipsel)
+             test -z "[$]2" || eval "[$]2=ArchMipsel"
+             ;;
+-        hppa|hppa1_1|ia64|m68k|rs6000|s390|s390x|sparc64|vax)
++        hppa|hppa1_1|ia64|m68k|powerpc64le|rs6000|s390|s390x|sparc64|vax)
+             test -z "[$]2" || eval "[$]2=ArchUnknown"
+             ;;
+         *)
+@@ -1877,6 +1877,9 @@
+   mips*)
+     $2="mips"
+     ;;
++  powerpc64le*)
++    $2="powerpc64le"
++    ;;
+   powerpc64*)
+     $2="powerpc64"
+     ;;
+Index: ghc-7.8.2/includes/Stg.h
+===================================================================
+--- ghc-7.8.2.orig/includes/Stg.h	2014-06-10 10:51:13.973444977 +0200
++++ ghc-7.8.2/includes/Stg.h	2014-06-10 10:51:13.973444977 +0200
+@@ -213,7 +213,7 @@
+ #define II_(X)          static StgWordArray (X) GNU_ATTRIBUTE(aligned (8))
+ #define IF_(f)    static StgFunPtr GNUC3_ATTRIBUTE(used) f(void)
+ #define FN_(f)    StgFunPtr f(void)
+-#define EF_(f)    extern StgFunPtr f(void)
++#define EF_(f)    extern StgFunPtr f()
+ 
+ /* -----------------------------------------------------------------------------
+    Tail calls
diff -rN -u old-ghc/patches/series new-ghc/patches/series
--- old-ghc/patches/series	2014-06-10 11:10:00.871625202 +0000
+++ new-ghc/patches/series	2014-06-10 11:10:00.887625192 +0000
@@ -3,3 +3,5 @@
 no-missing-haddock-file-warning
 haddock-hardcode-ghc-paths
 Fix-documentation-build-failure-without-GHCi.patch
+arm64.patch
+ppc64el.patch
diff -rN -u old-ghc/provided_substvars new-ghc/provided_substvars
--- old-ghc/provided_substvars	2014-06-10 11:10:00.871625202 +0000
+++ new-ghc/provided_substvars	2014-06-10 11:10:00.887625192 +0000
@@ -4,32 +4,46 @@
 
 open PKG, 'inplace/bin/ghc-pkg list --simple-output |'
     or die "ghc-pkg list failed: $!";
-my @pkgs;
+
 my @ignored = ('ghc', 'mtl', 'terminfo', 'haskeline', 'utf8-string', 'xhtml', 'rts', 'stm', 'parallel');
+my %ignored;
+$ignored{$_}++ for @ignored;
+
+my @no_conflict = ('cabal');
+my %no_conflict;
+$no_conflict{$_}++ for @no_conflict;
+
+my @pkgs;
 while (<PKG>) {
     y/A-Z/a-z/;
     my $pkgstring = $_;
     LOOP: while ($pkgstring =~ m,([^ ]*?)-\d.*? ?,g) {
 	my $pkg = $1;
-	foreach (@ignored, @pkgs) {
-	    next LOOP if $_ eq $pkg;
-	}
+	next if exists $ignored{$pkg};
 	push @pkgs, $1;
     }
 }
 close PKG;
 
+my $buf;
 open DEV, '>debian/ghc.substvars';
-print DEV 'provided-devs=';
-my $buf = "";
-foreach (@pkgs) {$buf .= "libghc-$_-dev, ";}
+$buf = "provided-devs=";
+foreach (sort @pkgs) {$buf .= "libghc-$_-dev, ";}
+$buf =~ s#(.*), #$1#;
+print DEV $buf."\n";
+
+$buf = "conflicting-devs=";
+foreach (sort @pkgs) {
+	next if $no_conflict{$_};
+	$buf .= "libghc-$_-dev, ";
+}
 $buf =~ s#(.*), #$1#;
 print DEV $buf."\n";
 close DEV;
 
 open PROF, '>debian/ghc-prof.substvars';
 print PROF 'provided-profs=';
-my $buf = "";
+$buf = "";
 foreach (@pkgs) {$buf .= "libghc-$_-prof, ";}
 $buf =~ s#(.*), #$1#;
 print PROF $buf."\n";
@@ -37,7 +51,[...incomplete...]



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