[Pkg-haskell-commits] darcs: ghc: Apply patch by Sergei Trofimovich to implement load_/store_load_barrier on armv6 and older (upstream ticket #10244)

[Joachim Breitner]

Thu May 14 07:37:01 UTC 2015  Joachim Breitner <mail at joachim-breitner.de>
  * Apply patch by Sergei Trofimovich to implement load_/store_load_barrier on armv6 and older (upstream ticket #10244)

    M ./changelog +8
    A ./patches/ARM-barriers.patch
    M ./patches/series +1

Thu May 14 07:37:01 UTC 2015  Joachim Breitner <mail at joachim-breitner.de>
  * Apply patch by Sergei Trofimovich to implement load_/store_load_barrier on armv6 and older (upstream ticket #10244)
diff -rN -u old-ghc/changelog new-ghc/changelog
--- old-ghc/changelog	2015-05-14 08:41:08.010290606 +0000
+++ new-ghc/changelog	2015-05-14 08:41:08.030290605 +0000
@@ -1,3 +1,11 @@
+ghc (7.10.1-3) UNRELEASED; urgency=medium
+
+  * Apply patch by Sergei Trofimovich to implement load_/store_load_barrier on
+    armv6 and older (upstream ticket #10244)
+
+
+ -- Joachim Breitner <nomeata at debian.org>  Thu, 14 May 2015 09:34:33 +0200
+
 ghc (7.10.1-2) experimental; urgency=medium
 
   * Build against llvm-3.5 (Closes: 784245) 
diff -rN -u old-ghc/patches/ARM-barriers.patch new-ghc/patches/ARM-barriers.patch
--- old-ghc/patches/ARM-barriers.patch	1970-01-01 00:00:00.000000000 +0000
+++ new-ghc/patches/ARM-barriers.patch	2015-05-14 08:41:08.022290605 +0000
@@ -0,0 +1,38 @@
+From 5fcb235d132065bc08752612f91a6d7c01d4fd6d Mon Sep 17 00:00:00 2001
+From: Sergei Trofimovich <siarheit at google.com>
+Date: Wed, 13 May 2015 23:13:57 +0100
+Subject: [PATCH] includes/stg/SMP.h: implement load_/store_load_barrier on
+ armv6 and older
+
+Fixes trac: #10244
+
+Signed-off-by: Sergei Trofimovich <siarheit at google.com>
+---
+ includes/stg/SMP.h | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/includes/stg/SMP.h b/includes/stg/SMP.h
+index 5ded05d..5460a2b 100644
+--- a/includes/stg/SMP.h
++++ b/includes/stg/SMP.h
+@@ -373,6 +373,8 @@ store_load_barrier(void) {
+     __asm__ __volatile__ ("sync" : : : "memory");
+ #elif sparc_HOST_ARCH
+     __asm__ __volatile__ ("membar #StoreLoad" : : : "memory");
++#elif arm_HOST_ARCH && defined(arm_HOST_ARCH_PRE_ARMv7)
++    __asm__ __volatile__ ("" : : : "memory");
+ #elif arm_HOST_ARCH && !defined(arm_HOST_ARCH_PRE_ARMv7)
+     __asm__ __volatile__ ("dmb" : : : "memory");
+ #elif aarch64_HOST_ARCH
+@@ -395,6 +397,8 @@ load_load_barrier(void) {
+ #elif sparc_HOST_ARCH
+     /* Sparc in TSO mode does not require load/load barriers. */
+     __asm__ __volatile__ ("" : : : "memory");
++#elif arm_HOST_ARCH && defined(arm_HOST_ARCH_PRE_ARMv7)
++    __asm__ __volatile__ ("" : : : "memory");
+ #elif arm_HOST_ARCH && !defined(arm_HOST_ARCH_PRE_ARMv7)
+     __asm__ __volatile__ ("dmb" : : : "memory");
+ #elif aarch64_HOST_ARCH
+-- 
+2.3.6
+
diff -rN -u old-ghc/patches/series new-ghc/patches/series
--- old-ghc/patches/series	2015-05-14 08:41:08.006290607 +0000
+++ new-ghc/patches/series	2015-05-14 08:41:08.026290605 +0000
@@ -3,3 +3,4 @@
 no-missing-haddock-file-warning
 hurd.diff
 ghc-7.8.4-3-aarch64.patch
+ARM-barriers.patch