[DHG_packages] 01/01: ghc: fix lwa instruction generation

[Clint Adams]

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commit b842610c4552f896ee8588a7c895ebfff685f971
Author: Clint Adams <clint at debian.org>
Date:   Mon Nov 14 11:10:21 2016 -0500

    ghc: fix lwa instruction generation
---
 p/ghc/debian/changelog                      |  5 ++-
 p/ghc/debian/patches/fix-ppc-lwa-generation | 64 +++++++++++++++++++++++++++++
 p/ghc/debian/patches/series                 |  1 +
 3 files changed, 68 insertions(+), 2 deletions(-)

diff --git a/p/ghc/debian/changelog b/p/ghc/debian/changelog
index e32d3de..482e3f8 100644
--- a/p/ghc/debian/changelog
+++ b/p/ghc/debian/changelog
@@ -1,8 +1,9 @@
-ghc (8.0.1-13) UNRELEASED; urgency=medium
+ghc (8.0.1-13) experimental; urgency=medium
 
   * Include ghc --info output in build log.
+  * PPC/CodeGen: fix lwa instruction generation.   closes: #844323
 
- -- Clint Adams <clint at debian.org>  Sat, 12 Nov 2016 00:31:46 -0500
+ -- Clint Adams <clint at debian.org>  Mon, 14 Nov 2016 11:10:09 -0500
 
 ghc (8.0.1-12) experimental; urgency=medium
 
diff --git a/p/ghc/debian/patches/fix-ppc-lwa-generation b/p/ghc/debian/patches/fix-ppc-lwa-generation
new file mode 100644
index 0000000..678004f
--- /dev/null
+++ b/p/ghc/debian/patches/fix-ppc-lwa-generation
@@ -0,0 +1,64 @@
+From ce3370e06165690e79a8eb22e5229b515157e00f Mon Sep 17 00:00:00 2001
+From: Peter Trommler <ptrommler at acm.org>
+Date: Sat, 1 Oct 2016 17:56:31 -0400
+Subject: [PATCH] PPC/CodeGen: fix lwa instruction generation
+
+Opcode lwa is a 64-bit opcode and allows a DS-form only.  This patch
+generates lwa opcodes only when the offset is a multiple of 4.
+
+Fixes #12621
+
+Test Plan: validate
+
+Reviewers: erikd, hvr, simonmar, austin, bgamari
+
+Reviewed By: bgamari
+
+Subscribers: thomie
+
+Differential Revision: https://phabricator.haskell.org/D2547
+
+GHC Trac Issues: #12621
+---
+ compiler/nativeGen/PPC/CodeGen.hs | 16 ++++++++++++----
+ 1 file changed, 12 insertions(+), 4 deletions(-)
+
+--- a/compiler/nativeGen/PPC/CodeGen.hs
++++ b/compiler/nativeGen/PPC/CodeGen.hs
+@@ -9,9 +9,8 @@
+ -----------------------------------------------------------------------------
+ 
+ -- This is a big module, but, if you pay attention to
+--- (a) the sectioning, (b) the type signatures, and
+--- (c) the #if blah_TARGET_ARCH} things, the
+--- structure should not be too overwhelming.
++-- (a) the sectioning, and (b) the type signatures,
++-- the structure should not be too overwhelming.
+ 
+ module PPC.CodeGen (
+         cmmTopCodeGen,
+@@ -471,7 +470,8 @@
+     return (Any II64 (\dst -> addr_code `snocOL` LD II32 dst addr))
+ 
+ getRegister' _ (CmmMachOp (MO_SS_Conv W32 W64) [CmmLoad mem _]) = do
+-    Amode addr addr_code <- getAmode D mem
++    -- lwa is DS-form. See Note [Power instruction format]
++    Amode addr addr_code <- getAmode DS mem
+     return (Any II64 (\dst -> addr_code `snocOL` LA II32 dst addr))
+ 
+ getRegister' dflags (CmmMachOp mop [x]) -- unary MachOps
+@@ -733,6 +733,14 @@
+     ... (tmp) ...
+ -}
+ 
++{- Note [Power instruction format]
++In some instructions the 16 bit offset must be a multiple of 4, i.e.
++the two least significant bits mus be zero. The "Power ISA" specification
++calls these instruction formats "DS-FORM" and the instructions with
++arbitrary 16 bit offsets are "D-FORM".
++
++The Power ISA specification document can be obtained from www.power.org.
++-}
+ data InstrForm = D | DS
+ 
+ getAmode :: InstrForm -> CmmExpr -> NatM Amode
diff --git a/p/ghc/debian/patches/series b/p/ghc/debian/patches/series
index 2662db1..f0fac5b 100644
--- a/p/ghc/debian/patches/series
+++ b/p/ghc/debian/patches/series
@@ -11,3 +11,4 @@ find-tycon-panic
 compiler-cmm-PprC-sparc-alignment.patch
 get-linker-flags-correctly
 x32-use-native-x86_64-insn.patch
+fix-ppc-lwa-generation

-- 
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