[Git][haskell-team/DHG_packages][master] clash-prelude: fixup d/copyright (again)
Scott Talbert (@swt2c)
gitlab at salsa.debian.org
Tue Aug 9 20:26:15 BST 2022
Scott Talbert pushed to branch master at Debian Haskell Group / DHG_packages
Commits:
5cfffbcb by Scott Talbert at 2022-08-09T15:17:44-04:00
clash-prelude: fixup d/copyright (again)
- - - - -
2 changed files:
- p/haskell-clash-prelude/debian/control
- p/haskell-clash-prelude/debian/copyright
Changes:
=====================================
p/haskell-clash-prelude/debian/control
=====================================
@@ -127,7 +127,7 @@ Standards-Version: 4.6.1
Homepage: https://clash-lang.org/
Vcs-Browser: https://salsa.debian.org/haskell-team/DHG_packages/tree/master/p/haskell-clash-prelude
Vcs-Git: https://salsa.debian.org/haskell-team/DHG_packages.git [p/haskell-clash-prelude]
-X-Description: Clash: a functional hardware description language - Prelude library
+X-Description: Functional hardware description language - Prelude library
Clash is a functional hardware description language that borrows both its
syntax and semantics from the functional programming language Haskell. The
Clash compiler transforms these high-level descriptions to low-level
@@ -135,30 +135,29 @@ X-Description: Clash: a functional hardware description language - Prelude libra
.
Features of Clash:
.
- * Strongly typed, but with a very high degree of type inference, enabling both
+ * Strongly typed, but with a very high degree of type inference, enabling both
safe and fast prototyping using concise descriptions.
.
- * Interactive REPL: load your designs in an interpreter and easily test all
+ * Interactive REPL: load your designs in an interpreter and easily test all
your component without needing to setup a test bench.
.
- * Higher-order functions, with type inference, result in designs that are
+ * Higher-order functions, with type inference, result in designs that are
fully parametric by default.
.
- * Synchronous sequential circuit design based on streams of values, called
+ * Synchronous sequential circuit design based on streams of values, called
@Signal at s, lead to natural descriptions of feedback loops.
.
- * Support for multiple clock domains, with type safe clock domain crossing.
- .
+ * Support for multiple clock domains, with type safe clock domain crossing.
.
This package provides:
.
- * Prelude library containing datatypes and functions for circuit design
+ * Prelude library containing datatypes and functions for circuit design
.
To use the library:
.
- * Import "Clash.Prelude"
+ * Import "Clash.Prelude"
.
- * Alternatively, if you want to explicitly route clock and reset ports,
+ * Alternatively, if you want to explicitly route clock and reset ports,
for more straightforward multi-clock designs, you can import the
"Clash.Explicit.Prelude" module. Note that you should not import
"Clash.Prelude" and "Clash.Explicit.Prelude" at the same time as they
=====================================
p/haskell-clash-prelude/debian/copyright
=====================================
@@ -24,15 +24,22 @@ Copyright: 2015-2016, Christiaan Baaij
License: CC-BY-4.0
Files: src/Clash/Examples/Internal.hs
-Copyright: 2015-2016, Christiaan Baaij
- 2017, Google Inc.
- 2019, Myrtle Software Ltd
+Copyright: © 2015-2016, Christiaan Baaij,
+ 2017 , Google Inc.
+ 2019 , Myrtle Software Ltd
License: CC-BY-4.0
Files: src/Clash/Sized/Internal/Mod.hs
Copyright: 2019, Andrew Lelechenko
License: MIT
+Files: src/Clash/Sized/Internal/BitVector.hs
+Copyright: (C) 2013-2016, University of Twente,
+ 2019 , Gergő Érdi
+ 2016-2019, Myrtle Software Ltd,
+ 2021-2022, QBayLogic B.V.
+License: BSD-2-clause
+
Files: debian/*
Copyright: held by the contributors mentioned in debian/changelog
License: BSD-2-clause
View it on GitLab: https://salsa.debian.org/haskell-team/DHG_packages/-/commit/5cfffbcb902bf13022d0a817befae40fff439590
--
View it on GitLab: https://salsa.debian.org/haskell-team/DHG_packages/-/commit/5cfffbcb902bf13022d0a817befae40fff439590
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