[Git][haskell-team/DHG_packages][master] 2 commits: ghc: Add patch to add platform support for hppa and sparc64

John Paul Adrian Glaubitz (@glaubitz) gitlab at salsa.debian.org
Sat Jan 10 19:40:59 GMT 2026



John Paul Adrian Glaubitz pushed to branch master at Debian Haskell Group / DHG_packages


Commits:
45488500 by John Paul Adrian Glaubitz at 2026-01-10T20:38:51+01:00
ghc: Add patch to add platform support for hppa and sparc64

- - - - -
320db2b8 by John Paul Adrian Glaubitz at 2026-01-10T20:40:38+01:00
ghc: Add patch to use modern GCC atomics built-ins in ghc-prim

- - - - -


4 changed files:

- p/ghc/debian/changelog
- + p/ghc/debian/patches/ghc-prim-modern-atomics.patch
- + p/ghc/debian/patches/hppa-sparc64-support.patch
- p/ghc/debian/patches/series


Changes:

=====================================
p/ghc/debian/changelog
=====================================
@@ -2,6 +2,8 @@ ghc (9.10.3-2) UNRELEASED; urgency=medium
 
   * Build with --enable-unregisterised on loong64 for bootstrap
   * Build with --param ggc-min-expand=10 on powerpc
+  * Add patch to add platform support for hppa and sparc64
+  * Add patch to use modern GCC atomics built-ins in ghc-prim
 
  -- John Paul Adrian Glaubitz <glaubitz at physik.fu-berlin.de>  Tue, 06 Jan 2026 10:50:15 +0100
 


=====================================
p/ghc/debian/patches/ghc-prim-modern-atomics.patch
=====================================
@@ -0,0 +1,205 @@
+Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
+===================================================================
+--- ghc-9.10.3.orig/libraries/ghc-prim/cbits/atomic.c
++++ ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
+@@ -16,28 +16,28 @@ extern StgWord hs_atomic_add8(StgWord x,
+ StgWord
+ hs_atomic_add8(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_add((volatile StgWord8 *) x, (StgWord8) val);
++  return __atomic_add_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_add16(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_add16(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_add((volatile StgWord16 *) x, (StgWord16) val);
++  return __atomic_add_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_add32(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_add32(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_add((volatile StgWord32 *) x, (StgWord32) val);
++  return __atomic_add_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord64 hs_atomic_add64(StgWord x, StgWord64 val);
+ StgWord64
+ hs_atomic_add64(StgWord x, StgWord64 val)
+ {
+-  return __sync_fetch_and_add((volatile StgWord64 *) x, val);
++  return __atomic_add_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
+ }
+ 
+ // FetchSubByteArrayOp_Int
+@@ -46,28 +46,28 @@ extern StgWord hs_atomic_sub8(StgWord x,
+ StgWord
+ hs_atomic_sub8(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_sub((volatile StgWord8 *) x, (StgWord8) val);
++  return __atomic_sub_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_sub16(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_sub16(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_sub((volatile StgWord16 *) x, (StgWord16) val);
++  return __atomic_sub_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_sub32(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_sub32(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_sub((volatile StgWord32 *) x, (StgWord32) val);
++  return __atomic_sub_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord64 hs_atomic_sub64(StgWord x, StgWord64 val);
+ StgWord64
+ hs_atomic_sub64(StgWord x, StgWord64 val)
+ {
+-  return __sync_fetch_and_sub((volatile StgWord64 *) x, val);
++  return __atomic_sub_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
+ }
+ 
+ // FetchAndByteArrayOp_Int
+@@ -76,28 +76,28 @@ extern StgWord hs_atomic_and8(StgWord x,
+ StgWord
+ hs_atomic_and8(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_and((volatile StgWord8 *) x, (StgWord8) val);
++  return __atomic_and_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_and16(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_and16(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_and((volatile StgWord16 *) x, (StgWord16) val);
++  return __atomic_and_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_and32(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_and32(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_and((volatile StgWord32 *) x, (StgWord32) val);
++  return __atomic_and_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord64 hs_atomic_and64(StgWord x, StgWord64 val);
+ StgWord64
+ hs_atomic_and64(StgWord x, StgWord64 val)
+ {
+-  return __sync_fetch_and_and((volatile StgWord64 *) x, val);
++  return __atomic_and_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
+ }
+ 
+ // FetchNandByteArrayOp_Int
+@@ -172,7 +172,7 @@ StgWord
+ hs_atomic_nand8(StgWord x, StgWord val)
+ {
+ #if USE_SYNC_FETCH_AND_NAND
+-  return __sync_fetch_and_nand((volatile StgWord8 *) x, (StgWord8) val);
++  return __atomic_nand_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
+ #else
+   CAS_NAND((volatile StgWord8 *) x, (StgWord8) val)
+ #endif
+@@ -183,7 +183,7 @@ StgWord
+ hs_atomic_nand16(StgWord x, StgWord val)
+ {
+ #if USE_SYNC_FETCH_AND_NAND
+-  return __sync_fetch_and_nand((volatile StgWord16 *) x, (StgWord16) val);
++  return __atomic_nand_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
+ #else
+   CAS_NAND((volatile StgWord16 *) x, (StgWord16) val);
+ #endif
+@@ -194,7 +194,7 @@ StgWord
+ hs_atomic_nand32(StgWord x, StgWord val)
+ {
+ #if USE_SYNC_FETCH_AND_NAND
+-  return __sync_fetch_and_nand((volatile StgWord32 *) x, (StgWord32) val);
++  return __atomic_nand_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
+ #else
+   CAS_NAND((volatile StgWord32 *) x, (StgWord32) val);
+ #endif
+@@ -205,7 +205,7 @@ StgWord64
+ hs_atomic_nand64(StgWord x, StgWord64 val)
+ {
+ #if USE_SYNC_FETCH_AND_NAND
+-  return __sync_fetch_and_nand((volatile StgWord64 *) x, val);
++  return __atomic_nand_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
+ #else
+   CAS_NAND((volatile StgWord64 *) x, val);
+ #endif
+@@ -219,28 +219,28 @@ extern StgWord hs_atomic_or8(StgWord x,
+ StgWord
+ hs_atomic_or8(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_or((volatile StgWord8 *) x, (StgWord8) val);
++  return __atomic_or_fetch ((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_or16(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_or16(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_or((volatile StgWord16 *) x, (StgWord16) val);
++  return __atomic_or_fetch ((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_or32(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_or32(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_or((volatile StgWord32 *) x, (StgWord32) val);
++  return __atomic_or_fetch ((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord64 hs_atomic_or64(StgWord x, StgWord64 val);
+ StgWord64
+ hs_atomic_or64(StgWord x, StgWord64 val)
+ {
+-  return __sync_fetch_and_or((volatile StgWord64 *) x, val);
++  return __atomic_or_fetch ((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
+ }
+ 
+ // FetchXorByteArrayOp_Int
+@@ -249,28 +249,28 @@ extern StgWord hs_atomic_xor8(StgWord x,
+ StgWord
+ hs_atomic_xor8(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_xor((volatile StgWord8 *) x, (StgWord8) val);
++  return  __atomic_xor_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_xor16(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_xor16(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_xor((volatile StgWord16 *) x, (StgWord16) val);
++  return  __atomic_xor_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord hs_atomic_xor32(StgWord x, StgWord val);
+ StgWord
+ hs_atomic_xor32(StgWord x, StgWord val)
+ {
+-  return __sync_fetch_and_xor((volatile StgWord32 *) x, (StgWord32) val);
++  return  __atomic_xor_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
+ }
+ 
+ extern StgWord64 hs_atomic_xor64(StgWord x, StgWord64 val);
+ StgWord64
+ hs_atomic_xor64(StgWord x, StgWord64 val)
+ {
+-  return __sync_fetch_and_xor((volatile StgWord64 *) x, val);
++  return  __atomic_xor_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
+ }
+ 
+ // CasByteArrayOp_Int


=====================================
p/ghc/debian/patches/hppa-sparc64-support.patch
=====================================
@@ -0,0 +1,84 @@
+Index: ghc-9.10.3/compiler/GHC/CmmToC.hs
+===================================================================
+--- ghc-9.10.3.orig/compiler/GHC/CmmToC.hs
++++ ghc-9.10.3/compiler/GHC/CmmToC.hs
+@@ -1350,6 +1350,7 @@ cLoad platform expr rep
+           bewareLoadStoreAlignment ArchMipsel   = True
+           bewareLoadStoreAlignment (ArchARM {}) = True
+           bewareLoadStoreAlignment ArchAArch64  = True
++          bewareLoadStoreAlignment ArchSPARC64  = True
+           -- Pessimistically assume that they will also cause problems
+           -- on unknown arches
+           bewareLoadStoreAlignment ArchUnknown  = True
+Index: ghc-9.10.3/libraries/ghc-platform/src/GHC/Platform/ArchOS.hs
+===================================================================
+--- ghc-9.10.3.orig/libraries/ghc-platform/src/GHC/Platform/ArchOS.hs
++++ ghc-9.10.3/libraries/ghc-platform/src/GHC/Platform/ArchOS.hs
+@@ -42,9 +42,11 @@ data Arch
+    | ArchARM ArmISA [ArmISAExt] ArmABI
+    | ArchAArch64
+    | ArchAlpha
++   | ArchHPPA
+    | ArchMipseb
+    | ArchMipsel
+    | ArchRISCV64
++   | ArchSPARC64
+    | ArchLoongArch64
+    | ArchJavaScript
+    | ArchWasm32
+@@ -134,10 +136,12 @@ stringEncodeArch = \case
+   ArchARM ARMv7 _ _ -> "armv7"
+   ArchAArch64       -> "aarch64"
+   ArchAlpha         -> "alpha"
++  ArchHPPA          -> "hppa"
+   ArchMipseb        -> "mipseb"
+   ArchMipsel        -> "mipsel"
+   ArchRISCV64       -> "riscv64"
+   ArchLoongArch64   -> "loongarch64"
++  ArchSPARC64       -> "sparc64"
+   ArchJavaScript    -> "javascript"
+   ArchWasm32        -> "wasm32"
+ 
+Index: ghc-9.10.3/m4/fptools_set_haskell_platform_vars.m4
+===================================================================
+--- ghc-9.10.3.orig/m4/fptools_set_haskell_platform_vars.m4
++++ ghc-9.10.3/m4/fptools_set_haskell_platform_vars.m4
+@@ -33,6 +33,9 @@ AC_DEFUN([FPTOOLS_SET_HASKELL_PLATFORM_V
+         alpha)
+             test -z "[$]2" || eval "[$]2=ArchAlpha"
+             ;;
++        hppa|hppa1_1)
++            test -z "[$]2" || eval "[$]2=ArchHPPA"
++            ;;
+         mips|mipseb)
+             test -z "[$]2" || eval "[$]2=ArchMipseb"
+             ;;
+@@ -48,7 +51,10 @@ AC_DEFUN([FPTOOLS_SET_HASKELL_PLATFORM_V
+         loongarch64)
+             test -z "[$]2" || eval "[$]2=ArchLoongArch64"
+             ;;
+-        hppa|hppa1_1|ia64|m68k|nios2|riscv32|loongarch32|rs6000|s390|sh4|sparc|sparc64|vax)
++        sparc64)
++            test -z "[$]2" || eval "[$]2=ArchSPARC64"
++            ;;
++        ia64|m68k|nios2|riscv32|loongarch32|rs6000|s390|sh4|sparc|vax)
+             test -z "[$]2" || eval "[$]2=ArchUnknown"
+             ;;
+         javascript)
+Index: ghc-9.10.3/utils/ghc-toolchain/src/GHC/Toolchain/ParseTriple.hs
+===================================================================
+--- ghc-9.10.3.orig/utils/ghc-toolchain/src/GHC/Toolchain/ParseTriple.hs
++++ ghc-9.10.3/utils/ghc-toolchain/src/GHC/Toolchain/ParseTriple.hs
+@@ -51,10 +51,11 @@ parseArch cc arch =
+       "mipseb" -> pure ArchMipseb
+       "mipsel" -> pure ArchMipsel
+       "riscv64" -> pure ArchRISCV64
+-      "hppa" -> pure ArchUnknown
++      "hppa" -> pure ArchHPPA
+       "wasm32" -> pure ArchWasm32
+       "javascript" -> pure ArchJavaScript
+       "loongarch64" -> pure ArchLoongArch64
++      "sparc64" -> pure ArchSPARC64
+       _ -> throwE $ "Unknown architecture " ++ arch
+ 
+ parseOs :: String -> M OS


=====================================
p/ghc/debian/patches/series
=====================================
@@ -20,3 +20,5 @@ alpha-fix-ieee_set_fp_control-invocation.patch
 hadrian-bootstrap-plan
 hadrian-unreg-template-haskell
 gnu-hurd
+hppa-sparc64-support.patch
+ghc-prim-modern-atomics.patch



View it on GitLab: https://salsa.debian.org/haskell-team/DHG_packages/-/compare/7911a774749f2f9c54127d66b492515d7d83a36a...320db2b8a5a57e66cfb71de997153f68f3cada0d

-- 
View it on GitLab: https://salsa.debian.org/haskell-team/DHG_packages/-/compare/7911a774749f2f9c54127d66b492515d7d83a36a...320db2b8a5a57e66cfb71de997153f68f3cada0d
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