[Git][haskell-team/DHG_packages][master] 2 commits: ghc: Match arm-unknown-linux to armv7-unknown-linux
Ilias Tsitsimpis (@iliastsi)
gitlab at salsa.debian.org
Mon Jan 19 22:02:21 GMT 2026
Ilias Tsitsimpis pushed to branch master at Debian Haskell Group / DHG_packages
Commits:
f148371c by Ilias Tsitsimpis at 2026-01-20T00:02:10+02:00
ghc: Match arm-unknown-linux to armv7-unknown-linux
- - - - -
caae811f by Ilias Tsitsimpis at 2026-01-20T00:02:10+02:00
ghc: Minor fixes for the ghc-prim-modern-atomics patch
- - - - -
4 changed files:
- p/ghc/debian/changelog
- + p/ghc/debian/patches/armhf-target-platform
- p/ghc/debian/patches/ghc-prim-modern-atomics.patch
- p/ghc/debian/patches/series
Changes:
=====================================
p/ghc/debian/changelog
=====================================
@@ -1,11 +1,16 @@
-ghc (9.10.3-2) UNRELEASED; urgency=medium
+ghc (9.10.3-2) unstable; urgency=medium
+ [ John Paul Adrian Glaubitz ]
* Build with --enable-unregisterised on loong64 for bootstrap
* Add patch to add platform support for hppa and sparc64
* Add patch to use modern GCC atomics built-ins in ghc-prim
* Build with -optc-no-integrated-cpp on powerpc
- -- John Paul Adrian Glaubitz <glaubitz at physik.fu-berlin.de> Tue, 06 Jan 2026 10:50:15 +0100
+ [ Ilias Tsitsimpis ]
+ * Patch configure to match arm-unknown-linux to armv7-unknown-linux (Closes:
+ #1124748)
+
+ -- Ilias Tsitsimpis <iliastsi at debian.org> Mon, 19 Jan 2026 23:20:19 +0200
ghc (9.10.3-1) unstable; urgency=medium
=====================================
p/ghc/debian/patches/armhf-target-platform
=====================================
@@ -0,0 +1,21 @@
+Description: Match arm-unknown-linux to armv7-unknown-linux
+Author: Ilias Tsitsimpis <iliastsi at debian.org>
+Bug: https://gitlab.haskell.org/ghc/ghc/-/issues/26734
+Bug-Debian: https://bugs.debian.org/1124748
+Forwarded: <URL|no|not-needed, useless if you have a Bug field, optional>
+
+Index: b/configure.ac
+===================================================================
+--- a/configure.ac
++++ b/configure.ac
+@@ -277,7 +277,9 @@ FP_PROG_SH
+
+ # Verify that the installed (bootstrap) GHC is capable of generating
+ # code for the requested build platform.
+-if test "$BuildPlatform" != "$bootstrap_target"
++if test "$BuildPlatform" != "$bootstrap_target" \
++ && (test "$BuildPlatform" != "arm-unknown-linux" \
++ || test "$bootstrap_target" != "armv7-unknown-linux")
+ then
+ echo "This GHC (${WithGhc}) does not generate code for the build platform"
+ echo " GHC target platform : $bootstrap_target"
=====================================
p/ghc/debian/patches/ghc-prim-modern-atomics.patch
=====================================
@@ -1,13 +1,13 @@
-Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
+Index: b/libraries/ghc-prim/cbits/atomic.c
===================================================================
---- ghc-9.10.3.orig/libraries/ghc-prim/cbits/atomic.c
-+++ ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
+--- a/libraries/ghc-prim/cbits/atomic.c
++++ b/libraries/ghc-prim/cbits/atomic.c
@@ -16,28 +16,28 @@ extern StgWord hs_atomic_add8(StgWord x,
StgWord
hs_atomic_add8(StgWord x, StgWord val)
{
- return __sync_fetch_and_add((volatile StgWord8 *) x, (StgWord8) val);
-+ return __atomic_add_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_add((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_add16(StgWord x, StgWord val);
@@ -15,7 +15,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_add16(StgWord x, StgWord val)
{
- return __sync_fetch_and_add((volatile StgWord16 *) x, (StgWord16) val);
-+ return __atomic_add_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_add((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_add32(StgWord x, StgWord val);
@@ -23,7 +23,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_add32(StgWord x, StgWord val)
{
- return __sync_fetch_and_add((volatile StgWord32 *) x, (StgWord32) val);
-+ return __atomic_add_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_add((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
}
extern StgWord64 hs_atomic_add64(StgWord x, StgWord64 val);
@@ -31,7 +31,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_add64(StgWord x, StgWord64 val)
{
- return __sync_fetch_and_add((volatile StgWord64 *) x, val);
-+ return __atomic_add_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_add((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
}
// FetchSubByteArrayOp_Int
@@ -40,7 +40,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_sub8(StgWord x, StgWord val)
{
- return __sync_fetch_and_sub((volatile StgWord8 *) x, (StgWord8) val);
-+ return __atomic_sub_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_sub((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_sub16(StgWord x, StgWord val);
@@ -48,7 +48,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_sub16(StgWord x, StgWord val)
{
- return __sync_fetch_and_sub((volatile StgWord16 *) x, (StgWord16) val);
-+ return __atomic_sub_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_sub((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_sub32(StgWord x, StgWord val);
@@ -56,7 +56,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_sub32(StgWord x, StgWord val)
{
- return __sync_fetch_and_sub((volatile StgWord32 *) x, (StgWord32) val);
-+ return __atomic_sub_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_sub((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
}
extern StgWord64 hs_atomic_sub64(StgWord x, StgWord64 val);
@@ -64,16 +64,16 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_sub64(StgWord x, StgWord64 val)
{
- return __sync_fetch_and_sub((volatile StgWord64 *) x, val);
-+ return __atomic_sub_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_sub((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
}
// FetchAndByteArrayOp_Int
-@@ -76,28 +76,28 @@ extern StgWord hs_atomic_and8(StgWord x,
+@@ -76,142 +76,60 @@ extern StgWord hs_atomic_and8(StgWord x,
StgWord
hs_atomic_and8(StgWord x, StgWord val)
{
- return __sync_fetch_and_and((volatile StgWord8 *) x, (StgWord8) val);
-+ return __atomic_and_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_and((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_and16(StgWord x, StgWord val);
@@ -81,7 +81,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_and16(StgWord x, StgWord val)
{
- return __sync_fetch_and_and((volatile StgWord16 *) x, (StgWord16) val);
-+ return __atomic_and_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_and((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_and32(StgWord x, StgWord val);
@@ -89,7 +89,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_and32(StgWord x, StgWord val)
{
- return __sync_fetch_and_and((volatile StgWord32 *) x, (StgWord32) val);
-+ return __atomic_and_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_and((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
}
extern StgWord64 hs_atomic_and64(StgWord x, StgWord64 val);
@@ -97,52 +97,134 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_and64(StgWord x, StgWord64 val)
{
- return __sync_fetch_and_and((volatile StgWord64 *) x, val);
-+ return __atomic_and_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_and((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
}
// FetchNandByteArrayOp_Int
-@@ -172,7 +172,7 @@ StgWord
+
+-// Note [__sync_fetch_and_nand usage]
+-// ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+-// The __sync_fetch_and_nand builtin is a bit of a disaster. It was introduced
+-// in GCC long ago with silly semantics. Specifically:
+-//
+-// *ptr = ~(tmp & value)
+-//
+-// Clang introduced the builtin with the same semantics.
+-//
+-// In GCC 4.4 the operation's semantics were rightly changed to,
+-//
+-// *ptr = ~tmp & value
+-//
+-// and the -Wsync-nand warning was added warning users of the operation about
+-// the change.
+-//
+-// Clang took this change as a reason to remove support for the
+-// builtin in 2010. Then, in 2014 Clang re-added support with the new
+-// semantics. However, the warning flag was given a different name
+-// (-Wsync-fetch-and-nand-semantics-changed) for added fun.
+-//
+-// Consequently, we are left with a bit of a mess: GHC requires GCC >4.4
+-// (enforced by the FP_GCC_VERSION autoconf check), so we thankfully don't need
+-// to support the operation's older broken semantics. However, we need to take
+-// care to explicitly disable -Wsync-nand wherever possible, lest the build
+-// fails with -Werror. Furthermore, we need to emulate the operation when
+-// building with some Clang versions (shipped by some Mac OS X releases) which
+-// lack support for the builtin.
+-//
+-// In the words of Bob Dylan: everything is broken.
+-//
+-// See also:
+-//
+-// * https://bugs.llvm.org/show_bug.cgi?id=8842
+-// * https://gitlab.haskell.org/ghc/ghc/issues/9678
+-//
+-
+-#define CAS_NAND(x, val) \
+- { \
+- __typeof__ (*(x)) tmp = *(x); \
+- while (!__sync_bool_compare_and_swap(x, tmp, ~(tmp & (val)))) { \
+- tmp = *(x); \
+- } \
+- return tmp; \
+- }
+-
+-// N.B. __has_builtin is only provided by clang
+-#if !defined(__has_builtin)
+-#define __has_builtin(x) 0
+-#endif
+-
+-#if defined(__clang__) && !__has_builtin(__sync_fetch_and_nand)
+-#define USE_SYNC_FETCH_AND_NAND 0
+-#else
+-#define USE_SYNC_FETCH_AND_NAND 1
+-#endif
+-
+-// Otherwise this fails with -Werror
+-#pragma GCC diagnostic push
+-#if defined(__clang__)
+-#pragma GCC diagnostic ignored "-Wsync-fetch-and-nand-semantics-changed"
+-#elif defined(__GNUC__)
+-#pragma GCC diagnostic ignored "-Wsync-nand"
+-#endif
+-
+ extern StgWord hs_atomic_nand8(StgWord x, StgWord val);
+ StgWord
hs_atomic_nand8(StgWord x, StgWord val)
{
- #if USE_SYNC_FETCH_AND_NAND
+-#if USE_SYNC_FETCH_AND_NAND
- return __sync_fetch_and_nand((volatile StgWord8 *) x, (StgWord8) val);
-+ return __atomic_nand_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
- #else
- CAS_NAND((volatile StgWord8 *) x, (StgWord8) val)
- #endif
-@@ -183,7 +183,7 @@ StgWord
+-#else
+- CAS_NAND((volatile StgWord8 *) x, (StgWord8) val)
+-#endif
++ return __atomic_fetch_nand((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
+ }
+
+ extern StgWord hs_atomic_nand16(StgWord x, StgWord val);
+ StgWord
hs_atomic_nand16(StgWord x, StgWord val)
{
- #if USE_SYNC_FETCH_AND_NAND
+-#if USE_SYNC_FETCH_AND_NAND
- return __sync_fetch_and_nand((volatile StgWord16 *) x, (StgWord16) val);
-+ return __atomic_nand_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
- #else
- CAS_NAND((volatile StgWord16 *) x, (StgWord16) val);
- #endif
-@@ -194,7 +194,7 @@ StgWord
+-#else
+- CAS_NAND((volatile StgWord16 *) x, (StgWord16) val);
+-#endif
++ return __atomic_fetch_nand((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
+ }
+
+ extern StgWord hs_atomic_nand32(StgWord x, StgWord val);
+ StgWord
hs_atomic_nand32(StgWord x, StgWord val)
{
- #if USE_SYNC_FETCH_AND_NAND
+-#if USE_SYNC_FETCH_AND_NAND
- return __sync_fetch_and_nand((volatile StgWord32 *) x, (StgWord32) val);
-+ return __atomic_nand_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
- #else
- CAS_NAND((volatile StgWord32 *) x, (StgWord32) val);
- #endif
-@@ -205,7 +205,7 @@ StgWord64
+-#else
+- CAS_NAND((volatile StgWord32 *) x, (StgWord32) val);
+-#endif
++ return __atomic_fetch_nand((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
+ }
+
+ extern StgWord64 hs_atomic_nand64(StgWord x, StgWord64 val);
+ StgWord64
hs_atomic_nand64(StgWord x, StgWord64 val)
{
- #if USE_SYNC_FETCH_AND_NAND
+-#if USE_SYNC_FETCH_AND_NAND
- return __sync_fetch_and_nand((volatile StgWord64 *) x, val);
-+ return __atomic_nand_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
- #else
- CAS_NAND((volatile StgWord64 *) x, val);
- #endif
-@@ -219,28 +219,28 @@ extern StgWord hs_atomic_or8(StgWord x,
+-#else
+- CAS_NAND((volatile StgWord64 *) x, val);
+-#endif
++ return __atomic_fetch_nand((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
+ }
+
+-#pragma GCC diagnostic pop
+
+ // FetchOrByteArrayOp_Int
+
+@@ -219,28 +137,28 @@ extern StgWord hs_atomic_or8(StgWord x,
StgWord
hs_atomic_or8(StgWord x, StgWord val)
{
- return __sync_fetch_and_or((volatile StgWord8 *) x, (StgWord8) val);
-+ return __atomic_or_fetch ((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_or((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_or16(StgWord x, StgWord val);
@@ -150,7 +232,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_or16(StgWord x, StgWord val)
{
- return __sync_fetch_and_or((volatile StgWord16 *) x, (StgWord16) val);
-+ return __atomic_or_fetch ((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_or((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_or32(StgWord x, StgWord val);
@@ -158,7 +240,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_or32(StgWord x, StgWord val)
{
- return __sync_fetch_and_or((volatile StgWord32 *) x, (StgWord32) val);
-+ return __atomic_or_fetch ((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_or((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
}
extern StgWord64 hs_atomic_or64(StgWord x, StgWord64 val);
@@ -166,16 +248,16 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_or64(StgWord x, StgWord64 val)
{
- return __sync_fetch_and_or((volatile StgWord64 *) x, val);
-+ return __atomic_or_fetch ((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_or((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
}
// FetchXorByteArrayOp_Int
-@@ -249,28 +249,28 @@ extern StgWord hs_atomic_xor8(StgWord x,
+@@ -249,28 +167,28 @@ extern StgWord hs_atomic_xor8(StgWord x,
StgWord
hs_atomic_xor8(StgWord x, StgWord val)
{
- return __sync_fetch_and_xor((volatile StgWord8 *) x, (StgWord8) val);
-+ return __atomic_xor_fetch((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_xor((volatile StgWord8 *) x, (StgWord8) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_xor16(StgWord x, StgWord val);
@@ -183,7 +265,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_xor16(StgWord x, StgWord val)
{
- return __sync_fetch_and_xor((volatile StgWord16 *) x, (StgWord16) val);
-+ return __atomic_xor_fetch((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_xor((volatile StgWord16 *) x, (StgWord16) val, __ATOMIC_SEQ_CST);
}
extern StgWord hs_atomic_xor32(StgWord x, StgWord val);
@@ -191,7 +273,7 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_xor32(StgWord x, StgWord val)
{
- return __sync_fetch_and_xor((volatile StgWord32 *) x, (StgWord32) val);
-+ return __atomic_xor_fetch((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_xor((volatile StgWord32 *) x, (StgWord32) val, __ATOMIC_SEQ_CST);
}
extern StgWord64 hs_atomic_xor64(StgWord x, StgWord64 val);
@@ -199,7 +281,18 @@ Index: ghc-9.10.3/libraries/ghc-prim/cbits/atomic.c
hs_atomic_xor64(StgWord x, StgWord64 val)
{
- return __sync_fetch_and_xor((volatile StgWord64 *) x, val);
-+ return __atomic_xor_fetch((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
++ return __atomic_fetch_xor((volatile StgWord64 *) x, val, __ATOMIC_SEQ_CST);
}
// CasByteArrayOp_Int
+@@ -347,10 +265,6 @@ hs_xchg64(StgWord x, StgWord64 val)
+ // __ATOMIC_SEQ_CST: Full barrier in both directions (hoisting and sinking
+ // of code) and synchronizes with acquire loads and release stores in
+ // all threads.
+-//
+-// When we lack C11 atomics support we emulate these using the old GCC __sync
+-// primitives which the GCC documentation claims "usually" implies a full
+-// barrier.
+
+ extern StgWord hs_atomicread8(StgWord x);
+ StgWord
=====================================
p/ghc/debian/patches/series
=====================================
@@ -22,3 +22,4 @@ hadrian-unreg-template-haskell
gnu-hurd
hppa-sparc64-support.patch
ghc-prim-modern-atomics.patch
+armhf-target-platform
View it on GitLab: https://salsa.debian.org/haskell-team/DHG_packages/-/compare/00bfcce7df88e944e11af8bb952fbf4023a1b835...caae811ffdc6bc15efb3fc704d0c818f26772a60
--
View it on GitLab: https://salsa.debian.org/haskell-team/DHG_packages/-/compare/00bfcce7df88e944e11af8bb952fbf4023a1b835...caae811ffdc6bc15efb3fc704d0c818f26772a60
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