[pkg-lua-devel] Bug#1087838: luajit: refresh patch to support riscv64 and loong64

Gianfranco Costamagna locutusofborg at debian.org
Thu Nov 21 12:03:31 GMT 2024


control: tags -1 patch pending

It turned out I failed to properly refresh the two patches, keeping out one define for s390x, and making the definitions go in the wrong #if statement.

I'm attaching the new diff

diff -Nru luajit-2.1.0+openresty20240815/debian/changelog luajit-2.1.0+openresty20240815/debian/changelog
--- luajit-2.1.0+openresty20240815/debian/changelog	2024-11-02 10:07:38.000000000 +0100
+++ luajit-2.1.0+openresty20240815/debian/changelog	2024-11-21 12:54:13.000000000 +0100
@@ -1,3 +1,11 @@
+luajit (2.1.0+openresty20240815-1.2) unstable; urgency=medium
+
+  * Non-maintainer upload
+  * Refresh patches of previous upload to fix riscv64, s390x, loong64
+    build failures (Closes: #1087838, 1087833)
+
+ -- Gianfranco Costamagna <locutusofborg at debian.org>  Thu, 21 Nov 2024 12:54:13 +0100
+
  luajit (2.1.0+openresty20240815-1.1) unstable; urgency=medium
  
    [ Bo YU <tsu.yubo at gmail.com> ]
diff -Nru luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols
--- luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols	2024-08-18 23:22:02.000000000 +0200
+++ luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols	2024-11-21 12:53:31.000000000 +0100
@@ -154,6 +154,6 @@
   luaopen_string at Base 2.0.4
   luaopen_string_buffer at Base 2.1.0
   luaopen_table at Base 2.0.4
- (arch=amd64 i386 arm64 armel armhf mips64el mipsel hurd-i386 powerpc)recff_thread_exdata2 at Base 2.1.0
- (arch=amd64 i386 arm64 armel armhf mips64el mipsel hurd-i386 powerpc)recff_thread_exdata at Base 2.1.0
+ (arch=amd64 i386 arm64 armel armhf mips64el mipsel riscv64 loong64 hurd-i386 powerpc)recff_thread_exdata2 at Base 2.1.0
+ (arch=amd64 i386 arm64 armel armhf mips64el mipsel riscv64 loong64 hurd-i386 powerpc)recff_thread_exdata at Base 2.1.0
   (arch=amd64)str_hash_init_sse42 at Base 2.1.0
diff -Nru luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch
--- luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch	2024-11-02 09:42:56.000000000 +0100
+++ luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch	2024-11-21 12:53:47.000000000 +0100
@@ -1494,7 +1494,7 @@
   
   ifneq (,$(findstring LJ_TARGET_PS3 1,$(TARGET_TESTARCH)))
     TARGET_SYS= PS3
-@@ -484,6 +489,9 @@
+@@ -487,6 +492,9 @@
       DASM_AFLAGS+= -D ELFV2
     endif
   endif
@@ -5410,22 +5410,22 @@
  +#define emit_spsub(as, ofs)	emit_addptr(as, RID_SP, -(ofs))
  --- a/src/lj_frame.h
  +++ b/src/lj_frame.h
-@@ -281,6 +281,15 @@
- #define CFRAME_OFS_PC		168
- #define CFRAME_OFS_MULTRES	160
- #define CFRAME_SIZE		240
+@@ -287,6 +287,15 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CAL
+ ** need to change to 3.
+ */
+ #define CFRAME_SHIFT_MULTRES	0
  +#elif LJ_TARGET_RISCV64
-+#define CFRAME_OFS_ERRF		252
-+#define CFRAME_OFS_NRES		248
-+#define CFRAME_OFS_PREV		240
++#define CFRAME_OFS_ERRF	252
++#define CFRAME_OFS_NRES	248
++#define CFRAME_OFS_PREV	240
  +#define CFRAME_OFS_L		232
  +#define CFRAME_OFS_PC		224
  +#define CFRAME_OFS_MULTRES	0
  +#define CFRAME_SIZE		256
  +#define CFRAME_SHIFT_MULTRES	3
- /*
- ** TODO: it would be good if we always decoded param*8 like
- ** the RISC architectures do. If so then SHIFT_MULTRES will
+ #else
+ #error "Missing CFRAME_* definitions for this architecture"
+ #endif
  --- a/src/lj_gdbjit.c
  +++ b/src/lj_gdbjit.c
  @@ -306,6 +306,9 @@
diff -Nru luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch
--- luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch	2024-11-02 10:02:32.000000000 +0100
+++ luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch	2024-11-21 12:54:00.000000000 +0100
@@ -2305,26 +2305,26 @@
   #else
   #error "Architecture not supported (in this version), see: https://luajit.org/status.html#architectures"
   #endif
-@@ -495,6 +499,20 @@
- #define LJ_TARGET_UNIFYROT	2	/* Want only IR_BROR, no ROLI */
- #define LJ_ARCH_NUMMODE		LJ_NUMMODE_DUAL
-
+@@ -499,6 +503,20 @@
+ #error "No support for RISC-V 64 Soft-float/Single-float"
+ #endif
+
  +#elif LUAJIT_TARGET == LUAJIT_ARCH_LOONGARCH64
-+#define LJ_ARCH_NAME		"loongarch64"
-+#define LJ_ARCH_BITS		64
-+#define LJ_ARCH_ENDIAN		LUAJIT_LE
-+#define LJ_TARGET_LOONGARCH64	1
-+#define LJ_TARGET_GC64		1
-+#define LJ_TARGET_EHRETREG	4
-+#define LJ_TARGET_EHRAREG	1
-+#define LJ_TARGET_JUMPRANGE	27	/* +-2^27 = +-128MB */
-+#define LJ_TARGET_MASKSHIFT	1
-+#define LJ_TARGET_MASKROT	1
-+#define LJ_TARGET_UNIFYROT	2	/* Want only IR_BROR. */
-+#define LJ_ARCH_NUMMODE		LJ_NUMMODE_DUAL
++#define LJ_ARCH_NAME           "loongarch64"
++#define LJ_ARCH_BITS           64
++#define LJ_ARCH_ENDIAN         LUAJIT_LE
++#define LJ_TARGET_LOONGARCH64  1
++#define LJ_TARGET_GC64         1
++#define LJ_TARGET_EHRETREG     4
++#define LJ_TARGET_EHRAREG      1
++#define LJ_TARGET_JUMPRANGE    27      /* +-2^27 = +-128MB */
++#define LJ_TARGET_MASKSHIFT    1
++#define LJ_TARGET_MASKROT      1
++#define LJ_TARGET_UNIFYROT     2       /* Want only IR_BROR. */
++#define LJ_ARCH_NUMMODE                LJ_NUMMODE_DUAL
  +
   #else
- #error "No support for RISC-V 64 Soft-float/Single-float"
+ #error "No target architecture defined"
   #endif
  @@ -529,6 +547,16 @@
   #error "Need at least GCC 4.8 or newer"
@@ -5010,13 +5010,13 @@
  --- luajit-2.1.0+openresty20240815.orig/src/lj_frame.h
  +++ luajit-2.1.0+openresty20240815/src/lj_frame.h
  @@ -296,6 +296,15 @@
- ** need to change to 3.
- */
- #define CFRAME_SHIFT_MULTRES	0
+ #define CFRAME_OFS_MULTRES	0
+ #define CFRAME_SIZE		256
+ #define CFRAME_SHIFT_MULTRES	3
  +#elif LJ_TARGET_LOONGARCH64
-+#define CFRAME_OFS_ERRF		196
-+#define CFRAME_OFS_NRES		192
-+#define CFRAME_OFS_PREV		184
++#define CFRAME_OFS_ERRF	196
++#define CFRAME_OFS_NRES	192
++#define CFRAME_OFS_PREV	184
  +#define CFRAME_OFS_L		176
  +#define CFRAME_OFS_PC		168
  +#define CFRAME_SIZE		200
-------------- next part --------------
diff -Nru luajit-2.1.0+openresty20240815/debian/changelog luajit-2.1.0+openresty20240815/debian/changelog
--- luajit-2.1.0+openresty20240815/debian/changelog	2024-11-02 10:07:38.000000000 +0100
+++ luajit-2.1.0+openresty20240815/debian/changelog	2024-11-21 12:54:13.000000000 +0100
@@ -1,3 +1,11 @@
+luajit (2.1.0+openresty20240815-1.2) unstable; urgency=medium
+
+  * Non-maintainer upload
+  * Refresh patches of previous upload to fix riscv64, s390x, loong64
+    build failures (Closes: #1087838, 1087833)
+
+ -- Gianfranco Costamagna <locutusofborg at debian.org>  Thu, 21 Nov 2024 12:54:13 +0100
+
 luajit (2.1.0+openresty20240815-1.1) unstable; urgency=medium
 
   [ Bo YU <tsu.yubo at gmail.com> ]
diff -Nru luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols
--- luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols	2024-08-18 23:22:02.000000000 +0200
+++ luajit-2.1.0+openresty20240815/debian/libluajit-5.1-2.symbols	2024-11-21 12:53:31.000000000 +0100
@@ -154,6 +154,6 @@
  luaopen_string at Base 2.0.4
  luaopen_string_buffer at Base 2.1.0
  luaopen_table at Base 2.0.4
- (arch=amd64 i386 arm64 armel armhf mips64el mipsel hurd-i386 powerpc)recff_thread_exdata2 at Base 2.1.0
- (arch=amd64 i386 arm64 armel armhf mips64el mipsel hurd-i386 powerpc)recff_thread_exdata at Base 2.1.0
+ (arch=amd64 i386 arm64 armel armhf mips64el mipsel riscv64 loong64 hurd-i386 powerpc)recff_thread_exdata2 at Base 2.1.0
+ (arch=amd64 i386 arm64 armel armhf mips64el mipsel riscv64 loong64 hurd-i386 powerpc)recff_thread_exdata at Base 2.1.0
  (arch=amd64)str_hash_init_sse42 at Base 2.1.0
diff -Nru luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch
--- luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch	2024-11-02 09:42:56.000000000 +0100
+++ luajit-2.1.0+openresty20240815/debian/patches/0003_support_riscv64.patch	2024-11-21 12:53:47.000000000 +0100
@@ -1494,7 +1494,7 @@
  
  ifneq (,$(findstring LJ_TARGET_PS3 1,$(TARGET_TESTARCH)))
    TARGET_SYS= PS3
-@@ -484,6 +489,9 @@
+@@ -487,6 +492,9 @@
      DASM_AFLAGS+= -D ELFV2
    endif
  endif
@@ -5410,22 +5410,22 @@
 +#define emit_spsub(as, ofs)	emit_addptr(as, RID_SP, -(ofs))
 --- a/src/lj_frame.h
 +++ b/src/lj_frame.h
-@@ -281,6 +281,15 @@
- #define CFRAME_OFS_PC		168
- #define CFRAME_OFS_MULTRES	160
- #define CFRAME_SIZE		240
+@@ -287,6 +287,15 @@ enum { LJ_CONT_TAILCALL, LJ_CONT_FFI_CAL
+ ** need to change to 3.
+ */
+ #define CFRAME_SHIFT_MULTRES	0
 +#elif LJ_TARGET_RISCV64
-+#define CFRAME_OFS_ERRF		252
-+#define CFRAME_OFS_NRES		248
-+#define CFRAME_OFS_PREV		240
++#define CFRAME_OFS_ERRF	252
++#define CFRAME_OFS_NRES	248
++#define CFRAME_OFS_PREV	240
 +#define CFRAME_OFS_L		232
 +#define CFRAME_OFS_PC		224
 +#define CFRAME_OFS_MULTRES	0
 +#define CFRAME_SIZE		256
 +#define CFRAME_SHIFT_MULTRES	3
- /*
- ** TODO: it would be good if we always decoded param*8 like
- ** the RISC architectures do. If so then SHIFT_MULTRES will
+ #else
+ #error "Missing CFRAME_* definitions for this architecture"
+ #endif
 --- a/src/lj_gdbjit.c
 +++ b/src/lj_gdbjit.c
 @@ -306,6 +306,9 @@
diff -Nru luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch
--- luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch	2024-11-02 10:02:32.000000000 +0100
+++ luajit-2.1.0+openresty20240815/debian/patches/0004_support_loong64.patch	2024-11-21 12:54:00.000000000 +0100
@@ -2305,26 +2305,26 @@
  #else
  #error "Architecture not supported (in this version), see: https://luajit.org/status.html#architectures"
  #endif
-@@ -495,6 +499,20 @@
- #define LJ_TARGET_UNIFYROT	2	/* Want only IR_BROR, no ROLI */
- #define LJ_ARCH_NUMMODE		LJ_NUMMODE_DUAL
- 
+@@ -499,6 +503,20 @@
+ #error "No support for RISC-V 64 Soft-float/Single-float"
+ #endif
+
 +#elif LUAJIT_TARGET == LUAJIT_ARCH_LOONGARCH64
-+#define LJ_ARCH_NAME		"loongarch64"
-+#define LJ_ARCH_BITS		64
-+#define LJ_ARCH_ENDIAN		LUAJIT_LE
-+#define LJ_TARGET_LOONGARCH64	1
-+#define LJ_TARGET_GC64		1
-+#define LJ_TARGET_EHRETREG	4
-+#define LJ_TARGET_EHRAREG	1
-+#define LJ_TARGET_JUMPRANGE	27	/* +-2^27 = +-128MB */
-+#define LJ_TARGET_MASKSHIFT	1
-+#define LJ_TARGET_MASKROT	1
-+#define LJ_TARGET_UNIFYROT	2	/* Want only IR_BROR. */
-+#define LJ_ARCH_NUMMODE		LJ_NUMMODE_DUAL
++#define LJ_ARCH_NAME           "loongarch64"
++#define LJ_ARCH_BITS           64
++#define LJ_ARCH_ENDIAN         LUAJIT_LE
++#define LJ_TARGET_LOONGARCH64  1
++#define LJ_TARGET_GC64         1
++#define LJ_TARGET_EHRETREG     4
++#define LJ_TARGET_EHRAREG      1
++#define LJ_TARGET_JUMPRANGE    27      /* +-2^27 = +-128MB */
++#define LJ_TARGET_MASKSHIFT    1
++#define LJ_TARGET_MASKROT      1
++#define LJ_TARGET_UNIFYROT     2       /* Want only IR_BROR. */
++#define LJ_ARCH_NUMMODE                LJ_NUMMODE_DUAL
 +
  #else
- #error "No support for RISC-V 64 Soft-float/Single-float"
+ #error "No target architecture defined"
  #endif
 @@ -529,6 +547,16 @@
  #error "Need at least GCC 4.8 or newer"
@@ -5010,13 +5010,13 @@
 --- luajit-2.1.0+openresty20240815.orig/src/lj_frame.h
 +++ luajit-2.1.0+openresty20240815/src/lj_frame.h
 @@ -296,6 +296,15 @@
- ** need to change to 3.
- */
- #define CFRAME_SHIFT_MULTRES	0
+ #define CFRAME_OFS_MULTRES	0
+ #define CFRAME_SIZE		256
+ #define CFRAME_SHIFT_MULTRES	3
 +#elif LJ_TARGET_LOONGARCH64
-+#define CFRAME_OFS_ERRF		196
-+#define CFRAME_OFS_NRES		192
-+#define CFRAME_OFS_PREV		184
++#define CFRAME_OFS_ERRF	196
++#define CFRAME_OFS_NRES	192
++#define CFRAME_OFS_PREV	184
 +#define CFRAME_OFS_L		176
 +#define CFRAME_OFS_PC		168
 +#define CFRAME_SIZE		200


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