Bug#738981: Fwd: Bug#738981: Switch to use generic_fpu for ARM
Thomas Orgis
thomas-forum at orgis.org
Tue Feb 25 16:44:03 UTC 2014
Am Tue, 25 Feb 2014 11:20:06 -0500
schrieb "Lennart Sorensen" <lsorense at csclub.uwaterloo.ca>:
> On Tue, Feb 25, 2014 at 11:18:50AM +0100, Thomas Orgis wrote:
> > Am Tue, 25 Feb 2014 17:37:41 +0900
> > schrieb Taihei Momma <tmkk at mac.com>:
> >
> > > #0 0xb6fb9332 in INT123_dct64_neon () at dct64_neon.S:48
> > > ^
> > > not a multiple of 4.
> > Index: src/libmpg123/dct64_neon.S
> > ===================================================================
> > --- src/libmpg123/dct64_neon.S (Revision 3514)
> > +++ src/libmpg123/dct64_neon.S (Revision 3515)
> > @@ -44,6 +44,7 @@
> > .word 1060439283
> > .word 1060439283
> > .globl ASM_NAME(dct64_neon)
> > + ALIGN4
> > ASM_NAME(dct64_neon):
> > vpush {q4-q7}
> >
Now ...
> Program received signal SIGILL, Illegal instruction.
> 0xb6fb9332 in INT123_dct64_neon () at dct64_neon.S:49
> 49 vpush {q4-q7}
That address didn't change. I suggest we better align the function
symbol itself, seems like we accidentally missed by one line:
ALIGN4
.globl ASM_NAME(dct64_neon)
ASM_NAME(dct64_neon):
looks better to me (at least that's how we did it for all other
functions;-). Care to test the current
http://mpg123.org/snapshot/mpg123-20140225173909.tar.bz2 ?
Sorry for the inconvenience, but I don't have a setup handy to test
this myself.
Alrighty then,
Thomas
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