[Pkg-electronics-commits] [verilator] branch master updated (184db19 -> 3c04318)

[أحمد المحمودي (Ahmed El-Mahmoudy)]

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aelmahmoudy-guest pushed a change to branch master
in repository verilator.

      from  184db19   Release 3.855-1
       new  d3d5d1d   Imported Upstream version 3.856
       new  3c04318   Merge tag 'upstream/3.856'

The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
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Summary of changes:
 Changes                                            |  23 +++++++
 README.pdf                                         | Bin 111871 -> 112648 bytes
 bin/verilator                                      |   4 +-
 configure                                          |  18 +++---
 configure.ac                                       |   2 +-
 include/verilated.h                                |  27 ++++++---
 include/verilated_config.h                         |   2 +-
 internals.pdf                                      | Bin 195228 -> 195641 bytes
 src/V3Ast.h                                        |  17 +++---
 src/V3AstNodes.cpp                                 |  29 +++++++++
 src/V3AstNodes.h                                   |  16 +++--
 src/V3Case.cpp                                     |  41 +++++++------
 src/V3Const.cpp                                    |  36 +++++++----
 src/V3Dead.cpp                                     |   4 +-
 src/V3File.cpp                                     |   7 ++-
 src/V3Inline.cpp                                   |   2 +-
 src/V3LinkParse.cpp                                |  16 ++++-
 src/V3ParseImp.h                                   |   5 ++
 src/V3ParseLex.cpp                                 |  17 +++++-
 src/V3Premit.cpp                                   |   6 +-
 src/V3TraceDecl.cpp                                |   3 +-
 src/V3Tristate.cpp                                 |  14 +++++
 src/V3Unknown.cpp                                  |  18 +++---
 src/V3Unroll.cpp                                   |  21 ++++---
 src/V3Width.cpp                                    |   3 +-
 src/V3WidthSel.cpp                                 |  64 +++++++++++---------
 src/config_build.h                                 |   2 +-
 src/config_rev.h                                   |   2 +-
 src/verilog.l                                      |  49 ++++++++-------
 src/verilog.y                                      |  29 +++++++--
 test_regress/driver.pl                             |   5 ++
 test_regress/t/t_EXAMPLE.v                         |   2 +-
 test_regress/t/{t_EXAMPLE.pl => t_bitsel_slice.pl} |   0
 .../t/{t_gen_for_shuffle.v => t_bitsel_slice.v}    |  37 ++++++------
 test_regress/t/{t_EXAMPLE.pl => t_case_inside.pl}  |   0
 test_regress/t/t_case_inside.v                     |  66 ++++++++++++++++++++
 test_regress/t/{t_EXAMPLE.pl => t_inside_wild.pl}  |   0
 .../t/{t_gen_for_shuffle.v => t_inside_wild.v}     |  40 ++++++------
 .../{t_array_pattern_packed.pl => t_inst_aport.pl} |   2 +-
 test_regress/t/{t_EXAMPLE.v => t_inst_aport.v}     |  67 ++++++++++++---------
 ...{t_param_circ_bad.pl => t_lint_input_eq_bad.pl} |   2 +-
 ...reproc_inc_inc_bad.vh => t_lint_input_eq_bad.v} |   8 ++-
 test_regress/t/{t_EXAMPLE.pl => t_parse_delay.pl}  |   0
 test_regress/t/t_parse_delay.v                     |  20 ++++++
 test_regress/t/t_trace_complex.out                 |  10 ++-
 test_regress/t/t_trace_complex.v                   |   7 +++
 test_regress/t/t_trace_complex_structs.out         |  10 ++-
 verilator.1                                        |   6 +-
 verilator.html                                     |  17 +++++-
 verilator.pdf                                      | Bin 388823 -> 389234 bytes
 verilator.txt                                      |  16 +++--
 51 files changed, 561 insertions(+), 231 deletions(-)
 copy test_regress/t/{t_EXAMPLE.pl => t_bitsel_slice.pl} (100%)
 copy test_regress/t/{t_gen_for_shuffle.v => t_bitsel_slice.v} (72%)
 copy test_regress/t/{t_EXAMPLE.pl => t_case_inside.pl} (100%)
 create mode 100644 test_regress/t/t_case_inside.v
 copy test_regress/t/{t_EXAMPLE.pl => t_inside_wild.pl} (100%)
 copy test_regress/t/{t_gen_for_shuffle.v => t_inside_wild.v} (72%)
 copy test_regress/t/{t_array_pattern_packed.pl => t_inst_aport.pl} (86%)
 copy test_regress/t/{t_EXAMPLE.v => t_inst_aport.v} (59%)
 copy test_regress/t/{t_param_circ_bad.pl => t_lint_input_eq_bad.pl} (88%)
 copy test_regress/t/{t_preproc_inc_inc_bad.vh => t_lint_input_eq_bad.v} (71%)
 copy test_regress/t/{t_EXAMPLE.pl => t_parse_delay.pl} (100%)
 create mode 100644 test_regress/t/t_parse_delay.v

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