[sane-devel] Adding 700F/5600F to the gensys backend

[Stefan Larsson]

2011/1/4 stef <stef.dev at free.fr>

> Le Friday 31 December 2010 13:36:20 Stefan Larsson, vous avez écrit :
> > Thank you for the information.
> >
> > I have extracted some information but it is a bit unclear how to proceed.
> I
> > need to be able to isolate which portions are doing what. How do you
> > usually perform the analysis in an efficient manner?  Since I am totally
> > unfamiliar with the protocol I am not sure how to start finding the
> > appropriate information.
> >
> > All the files are present in the attached file. Check readme.txt for
> > further information.
> >
> > I also contacted Canon Sweden to ask for any technical information or a
> > contact person which may simplify things. The support issue just got
> > escalated to another department. We will see what that could give.
> >
> > /Stefan
> >
>         Hello,
>
>        the decoded windows log seems to be missing the first URB when
> scanner is
> plugged. Important things happen then. You should logged it at least once.
> It
> helps determining the memory layout, the initial reigster set and the
> starting
> GPIO.
>        Try to record it, then the first step you could try is to adjust the
> registers for the memory layout. There is a table 'layouts' in
> genesys_gl847.h
> where you should tune registers d0-d2, e0-e7 based on the value you'll find
> in
> the decoded log.
>        The next step would be the GPIO, the registers to look are used in
> gl847_init_pio(), have special care for REG6C occurences.
>
> Regards,
>         Stef
>

Ok, I have been able to get some initial very short "buzz"-sound out of the
scanner now, which means it is responding to the initial register
initialization. The execution is ending with the log below (I guess that the
problem is with the unsupported frontend type 0):

...
[genesys_gl847] gl847_init_memory_layout completed
[genesys_low] sanei_genesys_write_gl847_register (0xf8, 0x01) completed
[genesys_gl847] gl847_cold_boot completed
[genesys_gl847] gl847_set_fe (init)
[genesys_low] sanei_genesys_read_gl847_register(0x04)=0x20
[genesys_gl847] gl847_set_fe(): unsupported frontend type 0
[genesys_gl847] gl847_set_fe completed
scanimage: open of device genesys:libusb:001:003 failed: Operation not
supported
[genesys] sane_exit: start
[genesys] sane_exit: exit

The changes so far are attached in the diff-file. I am not sure how such
changes are to be incorporated in the code. There needs to be some kind of
adaptability such as for the memory mapping.

I was also unable to find any values for 0xd1 and 0xd2.

Regarding the GPIO i am unsure how to interpret the rules in
gl847_init_gpio() and what I am seeing in the logs. I guess I have to modify
those rules to comply with what is seen below:

genesys_read_register(0x6c)=0x80
genesys_write_register(0x6c,0x80)
genesys_read_register(0x6c)=0x80
genesys_write_register(0x6c,0x80)

genesys_read_register(0x6c)=0x80
genesys_write_register(0x6c,0x81)
genesys_read_register(0x6c)=0x81
genesys_write_register(0x6c,0xc1)
genesys_read_register(0x6c)=0xc1
genesys_write_register(0x6c,0xd1)

genesys_read_register(0x6c)=0xd1
genesys_write_register(0x6c,0xd1)
genesys_read_register(0x6c)=0xd1
genesys_read_register(0x6c)=0xd1
genesys_write_register(0x6c,0xf1)
genesys_read_register(0x6c)=0xf1

genesys_read_register(0x6c)=0xf1
genesys_write_register(0x6c,0xf1)
genesys_read_register(0x6c)=0xf1
genesys_write_register(0x6c,0xf1)

genesys_read_register(0x6c)=0xf1
genesys_write_register(0x6c,0xf1)
genesys_read_register(0x6c)=0xf1
genesys_write_register(0x6c,0xf1)

/Stefan
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